IP Library Granted Patent US 6,934,953
Granted Patent B2
US 6,934,953 · App. 09/997,669 · Granted Aug 23, 2005

Deferred procedure call in interface description language

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Quick Facts
Patent No.
US 6,934,953
App. No.
09/997,669
Granted
Aug 23, 2005
Kind
B2
Abstract

Described is a distributed processing system comprising a plurality of processing objects and an object management system. At least two of the processing objects comprise an interface in the object management system defining a bi-directional non-blocking procedure call from first processing object to a second processing object according to an interface definition language.

Claims (56)

1. A distributed processing system comprising:

a plurality of processing objects; and

an object management system,

wherein at least two of the processing objects comprise an interface in the object management system defining a deferred procedure call from first processing object to a second processing object according to an interface definition language, the interface definition language including a source code instruction having a syntax including an “interface” keyword, an interface name, a return value type, a function name, at least one function argument, and an identifier from a set of values that includes an identifier of a one-way procedure call, an identifier of a two-way blocking procedure call, and an identifier of a deferred procedure call;

wherein the first processing object comprises:

logic to execute a crosscall stub to initiate the procedure call to the second processing object; and

logic to execute a callback skeleton in response to receipt of a return value from the second processing object,

wherein the crosscall stub and callback skeleton are derived from a compilation of the deferred procedure call instruction formatted according to the interface description language.

2. The distributed processing system of claim 1 , the distributed processing system further comprising:

a control plane comprising at least one processing object; and

a data plane comprising at least one processing object,

wherein the interface in the object management system defines a deferred procedure call from a processing object in the control plane to a processing object in the data plane.

3. The distributed processing system of claim 2 , wherein the processing object in the data plane comprises an interface to one or more microengine processes.

4. The distributed processing system of claim 1 , the distributed processing system further comprising:

a control plane comprising at least one processing object; and

a data plane comprising at least one processing object,

wherein the interface in the object management system defines a non-blocking procedure call from a processing object in the control plane to a processing object in the data plane.

5. The distributed processing system of claim 4 , wherein the processing object in the data plane comprises an interface to one or more microengine processes.

6. The distributed processing system of claim 1 , wherein the second processing object comprises logic to execute a crosscall skeleton in response to a procedure call from the crosscall stub.

7. The distributed processing system of claim 6 , wherein the crosscall stub and callback skeleton comprise image generated from a compilation of a single procedure call interface definition formatted according to the interface description language, and wherein the second processing object comprises logic to asynchronously call back the first processing object in response to the procedure call.

8. A processing system comprising:

a first processing core adapted to process information in data packets received from a transmission medium; and

a second processing core comprising:

a plurality of processing objects, at least one processing object having an interface with one or more processes hosted on the first processing core; and

an object management system, wherein at least two of the processing objects comprise an interface in the object management system defining a deferred procedure call from first processing object to a second processing object according to an interface definition language, the interface definition language including a source code instruction having a syntax including an “interface” keyword, an interface name, a return value type, a function name, at least one function argument, and an identifier from a set of values that includes an identifier of a one-way procedure call, an identifier of a two-way blocking procedure call, and an identifier of a deferred procedure call;

wherein the first processing object comprises:

logic to execute a crosscall stub to initiate the procedure call to the second processing object; and

logic to execute a callback skeleton in response to receipt of a return value from the second processing object,

wherein the crosscall stub and callback skeleton are derived from a compilation of the deferred procedure call instruction formatted according to the interface description language.

9. The processing system of claim 8 , wherein the first processing core comprises a plurality of microengine processing elements.

10. The processing system of claim 8 , the processing system further comprising:

a control plane comprising at least one processing object; and

a data plane comprising at least one processing object,

wherein the interface in the object management system defines a deferred procedure call from a processing object in the control plane to a processing object in the data plane.

11. The processing system of claim 10 , wherein the processing object in the data plane comprises an interface to one or more microengine processes.

12. The processing system of claim 8 , the distributed processing system further comprising:

a control plane comprising at least one processing object; and

a data plane comprising at least one processing object,

wherein the interface in the object management system defines a non-blocking procedure call from a processing object in the control plane to a processing object in the data plane.

13. The processing system of claim 12 , wherein the processing object in the data plane comprises an interface to one or more microengine processes.

14. The processing system of claim 8 , wherein the second processing object comprises logic to execute a crosscall skeleton in response to a procedure call from the crosscall stub.

15. The processing system of claim 8 , wherein the crosscall stub and callback skeleton comprise image generated from a compilation of a single procedure call interface definition formatted according to the interface description language, and wherein the second processing object comprises logic to asynchronously call back the first processing object in response to the procedure call.

16. A computerized method for distributed processing system comprising:

accessing a deferred procedure call instruction in a source code module corresponding with a first processing object, the deferred procedure call instruction being formatted according to an interface description language, the interface instruction having a syntax including an “interface” keyword, an interface name, a return value type, a function name, at least one function argument, and an identifier from a set of values that includes an identifier of a one-way procedure call, an identifier of a two-way blocking procedure call, and an identifier of a deferred procedure call;

compiling the source code module to provide a crosscall stub image and a callback skeleton image based upon the deferred procedure call instruction, wherein the callback skeleton image comprises instructions enabling execution of the first processing object following a procedure call to a second processing object and prior to receipt of a return value at the callback skeleton.

17. The method of claim 16 , wherein the method further comprises linking the crosscall stub image and callback skeleton image with a crosscall skeleton image associated with the second processing object.

18. The method of claim 17 , wherein the first processing object comprises a processing object in a control plane of a distributed processing system and the second processing object comprises a processing object in a data plane of the distributed processing system.

19. The method of claim 17 , wherein the first processing object comprises a processing object in a data plane of a distributed processing system and the second processing object comprises a processing object in a control plane of the distributed processing system.

20. The method of claim 16 , wherein the syntax comprises a syntax of: interface <name> {oneway|twoway|deferred} <type> <function 13 name> (<arguments>).

21. An computer executable program product on a storage medium comprising machine-readable instructions for:

accessing formatting a deferred procedure call instruction in a source code module corresponding with a first processing object, the deferred procedure call instruction being formatted according to an interface description language, the interface instruction having a syntax including an “interface” keyword, an interface name, a return value type, a function name, at least one function argument, and an identifier from a set of values that includes an identifier of a one-way procedure call, an identifier of a two-way blocking procedure call, and an identifier of a deferred procedure call; and

compiling the source code module to provide a crosscall stub image and a callback skeleton image based upon the deferred procedure call instruction, wherein the callback skeleton image comprises instructions enabling execution of the first processing object following a procedure call to a second processing object and prior to receipt of a return value at the callback skeleton.

22. The article of claim 21 , wherein the storage medium further comprises machine-readable instructions stored thereon for linking the crosscall stub image and callback skeleton image with a crosscall skeleton image associated with the second processing object.

23. The article of claim 22 , wherein the first processing object comprises a processing object in a control plane of a distributed processing system and the second processing object comprises a processing object in a data plane of the distributed processing system.

24. The article of claim 22 , wherein the first processing object comprises a processing object in a data plane of a distributed processing system and the second processing object comprises a processing object in a control plane of the distributed processing system.

25. The article of claim 21 , wherein the syntax comprises a syntax of: interface <name> {oneway|twoway|deferred} <type> <function 13 name> (<arguments>).

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 4, 2013
From: INTEL CORPORATION
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030747/0001 →