IP Library Granted Patent US 6,477,075
Granted Patent Utility
US 6,477,075 · Confirmation No. 6994

MEMORY CIRCUIT/LOGIC CIRCUIT INTEGRATED DEVICE CAPABLE OF REDUCING TERM OF WORKS

Inventor: Tsukasa Ooishi
⬇ PDF
Code Description Pages PDF
2001-12-06 TRNA Transmittal of New Application 3 View
2001-12-06 A.PE Preliminary Amendment 1 View
2001-12-06 SPEC Specification 55 View
2001-12-06 CLM Claims 8 View
2001-12-06 ABST Abstract 1 View
2001-12-06 DRW Drawings-only black and white line drawings 53 View
2001-12-06 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,477,075
App. No.
10/003,255
Filed
2001-12-06
Granted
2002-11-05
Pub. No.
US20020048182A1
Art Unit
2824
PTA
0 days