IP Library › Granted Patent US 6,741,193
Granted Patent Utility
US 6,741,193 · Confirmation No. 2718

PARLLEL IN SERIAL OUT CIRCUIT HAVING FLIP-FLOP LATCHING AT MUTIPLE CLOCK RATES

Inventor: Yoshihito Nagata
Patented Case View Patent ↗ View Publication ↗
⬇ PDF
 Code Description Pages PDF
2003-12-12 IDS Information Disclosure Statement (IDS) Form (SB08) 3 View
2003-12-12 FOR Foreign Reference 23 View
2003-12-12 FOR Foreign Reference 8 View
2003-12-12 FOR Foreign Reference 7 View
2003-12-12 FOR Foreign Reference 7 View
2003-12-12 FOR Foreign Reference 11 View
2003-12-12 FOR Foreign Reference 15 View
2003-12-12 FOR Foreign Reference 30 View
2003-11-12 LET. Miscellaneous Incoming Letter 1 View
2003-11-12 DRW Drawings-only black and white line drawings 12 View
2001-11-08 TRNA Transmittal of New Application 1 View
2001-11-08 SPEC Specification 14 View
2001-11-08 CLM Claims 3 View
2001-11-08 ABST Abstract 1 View
2001-11-08 DRW Drawings-only black and white line drawings 12 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
Patent No.
US 6,741,193
App. No.
10/010,073
Filed
2001-11-08
Granted
2004-05-25
Pub. No.
US20020075173A1
Art Unit
2819
PTA
-150 days