IP Library Granted Patent US 7,462,530
Granted Patent B2
US 7,462,530 · App. 10/011,774 · Granted Dec 9, 2008

Method for manufacturing a semiconductor device having an element isolation region

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Quick Facts
Patent No.
US 7,462,530
App. No.
10/011,774
Granted
Dec 9, 2008
Kind
B2
Abstract

An n-type buried diffusion layer is formed on the surface layer of the prescribed area of a p-type silicon substrate, and a p-type first high-concentration isolation diffusion layer is formed in the silicon substrate so as to surround the buried diffusion layer. An n-type epitaxial layer is formed on the silicon substrate, the buried diffusion layer, and the first high-concentration isolation diffusion layer. A p-type second high-concentration isolation diffusion layer is formed in the epitaxial layer on the first high-concentration isolation diffusion layer. A p-type low-concentration isolation diffusion layer for isolating the epitaxial layer into a plurality of island regions is formed in the epitaxial layer on the second high-concentration isolation diffusion layer.

Claims (33)

1. A method for manufacturing a semiconductor device, comprising the steps of:

forming a buried diffusion layer of a second conductivity type in the surface layer of a prescribed area of a substrate of a first conductivity type;

forming a first high-concentration isolation diffusion layer of the first conductivity type in the substrate so as to surround the buried diffusion layer;

forming an epitaxial layer of the second conductivity type on the substrate, the buried diffusion layer, and the first high-concentration isolation diffusion layer;

forming a low-concentration isolation diffusion layer of the first conductivity type in the epitaxial layer on the first high-concentration isolation diffusion layer, the low-concentration isolation diffusion layer isolating the epitaxial layer into a plurality of island regions;

forming a second high-concentration isolation diffusion layer of the first conductivity type in the junction area between the first high-concentration isolation diffusion layer and the low-concentration isolation diffusion layer;

forming a high-concentration diffusion layer of the first conductivity type in direct physical contact with an upper layer of said buried diffusion layer; forming, after formation of the epitaxial layer, a first diffusion layer of the first conductivity type in a third island region of the epitaxial layer on the buried diffusion layer;

forming a second diffusion layer of the second conductivity type in the third island region adjacent to the first diffusion layer; and

forming a high-concentration diffusion layer of the first conductivity type in the junction area between the buried diffusion layer and the first diffusion layer;

wherein said step of forming the first diffusion layer is simultaneously performed with said step of forming the low-concentration isolation diffusion layer, and

said step of forming the high-concentration diffusion layer is simultaneously performed with said step of forming the second high-concentration isolation diffusion layer.

2. The method for manufacturing a semiconductor device according to claim 1 ,

wherein said step of forming the low-concentration isolation diffusion layer and the first diffusion layer is simultaneously performed with said step of forming the second high-concentration isolation diffusion layer and the high-concentration diffusion layer.

3. The method for manufacturing a semiconductor device according to claim 2 ,

wherein the low-concentration isolation diffusion layer, the first diffusion layer, the second high-concentration isolation diffusion layer, and the high-concentration diffusion layer are formed by implanting impurities several times using the same mask and by thermally diffusing the impurities, and

the depths of the impurities implanted several times are different.

4. The method for manufacturing a semiconductor device according to claim 1 ,

wherein the low-concentration isolation diffusion layer and the first diffusion layer are formed by implanting impurities several times using the same mask and by thermally diffusing the impurities, and

the depths of the impurities implanted several times are different.

5. A method for manufacturing a semiconductor device, comprising the steps of:

forming a buried diffusion layer of a second conductivity type in the surface layer of a prescribed area of a substrate of a first conductivity type;

forming a first high-concentration isolation diffusion layer of the first conductivity type in the substrate so as to surround the buried diffusion layer;

forming an epitaxial layer of the second conductivity type on the substrate, the buried diffusion layer, and the first high-concentration isolation diffusion 1 ayer;

forming a low-concentration isolation diffusion layer of the first conductivity type in the epitaxial layer on the first high-concentration isolation diffusion layer, the low-concentration isolation diffusion layer isolating the epitaxial layer into a plurality of island regions;

forming a second high-concentration isolation diffusion layer of the first conductivity type in the junction area between the first high-concentration isolation diffusion layer and the low-concentration isolation diffusion layer;

forming a high-concentration diffusion layer of the first conductivity type in direct physical contact with an upper layer of said buried diffusion layer;

forming, after formation of the epitaxial layer, a first diffusion layer of the first conductivity type in a third island region of the epitaxial layer on the buried diffusion layer;

forming a second diffusion layer of the second conductivity type in the third island region adjacent to the first diffusion layer;

forming a high-concentration diffusion layer of the first conductivity type in the junction area between the buried diffusion layer and the first diffusion layer;

forming, after formation of the high-concentration diffusion layer, a third circuit element having a diffusion region of the second conductivity type in the first diffusion layer; and

forming a fourth circuit element having a diffusion region of the first conductivity type in the second diffusion layer,

wherein said step of forming the first diffusion layer is simultaneously performed with said step of forming the low-concentration isolation diffusion layer, and

said step of forming the high-concentration diffusion layer is simultaneously performed with said step of forming the second high-concentration isolation diffusion layer.

Assignments (5)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
CHANGE OF NAME Recorded Sep 13, 2010
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024973/0598 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 7, 2004
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 015185/0122 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2003
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 014502/0289 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 11, 2001
From: RITTAKU, SATOSHI
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 012370/0100 →