IP Library Granted Patent US 7,295,630
Granted Patent B2
US 7,295,630 · App. 10/015,848 · Granted Nov 13, 2007

Receiver having a variable threshold slicer stage and a method of updating the threshold levels of the slicer stage

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Quick Facts
Patent No.
US 7,295,630
App. No.
10/015,848
Granted
Nov 13, 2007
Kind
B2
Abstract

A receiver having a variable bit slicer for detecting bits in a demodulated signal, comprises a demodulator ( 14 ) for deriving a demodulated bit rate signal, means ( 36 ) for storing a plurality of threshold values, each of the threshold values being selectively adjustable, means ( 28, 38 ) for selecting the threshold value for comparison with the current bit signal (S n ) in response to a sequence of N bits (where N is at least 2) (B n-1 , B n-2 ) received prior to the current bit (B n ) and means ( 38, 40 ) for using the current bit to update the selected threshold value. Also disclosed is a method of dc offset correction.

Claims (18)

1. A method, comprising:

determining a bit value of a demodulated signal, in which N previously detected bits (where N is at least 2) of a demodulated bit stream are used to select which one of a plurality of threshold levels against which a current demodulated bit is to be compared in a bit slicer and is to be updated using the current demodulated bit;

subtracting the demodulated signal from one of a plurality of selected preset default values to produce a current dc offset estimate, deriving a mean dc offset estimate from the current dc offset estimate and a plurality of preceding dc offset estimates, combining the mean dc offset estimate with the selected threshold value and applying the combined signal to a threshold input of the bit slicer;

adjusting a responsiveness of the mean dc offset estimate with respect to drift;

oversampling the demodulated by a factor M, where M is an interger on the order of 20;

intermittently integrating a least one sample in the vicinity of the M/2 sample of each of at least 2 bit periods of the demodulated signal to generate a demodulated signal to be compared with the selected one of the threshold values;

comparing a result of the integrating with the selected threshold level; and

using the result to update the selected threshold value.

2. A method as claimed in claim 1 further comprising: providing P (where P is at least 2) mean estimators associated with each of the threshold levels, and for a selected one of the plurality of threshold levels obtaining an average value of the associated P mean estimators and using the result as the selected one of the threshold values.

3. A method as claimed in claim 1 , further comprising: after oversampling the demodulated bit stream, weighting samples of the demodulated bit stream.

4. A method as claimed in claim 1 , further comprising: subtracting the dc offset estimate from the demodulated signal prior to updating the selected threshold value.

5. A method of effecting dc offset compensation in a receiver having a variable threshold bit slicer, comprising selecting one of a plurality of preset default threshold values in accordance with a bit sequence formed by a current (n) and (n-1) earlier bit values as determined by the variable threshold bit slicer, obtaining a demodulated signal integrated over at least 2 bit periods, subtracting the demodulated signal from the selected preset default threshold value to produce a current do offset estimate, deriving a mean dc offset estimate from the current dc offset estimate and a plurality of preceding dc offset estimates, using the mean dc offset estimate to remove an effect of dc offset in determining the value of the demodulated signal; and adjusting a responsiveness of the mean dc offset estimate with respect to drift.

6. A method as claimed in claim 5 , wherein the mean dc offset estimate is combined with the selected threshold value and in that the combined signal is applied to a threshold input of the bit slicer.

7. A receiver having a variable threshold slicer, comprising means for deriving a demodulated bit stream, means for storing a plurality of threshold values, each of the plurality of threshold values being selectively adjustable, means for selecting one of the plurality of threshold values for determining a current bit and for adjustment of the selected threshold value in response to a sequence of N bits (where N is at least 2) including bits received prior to the currentbit and means for using the current bit to update the selected threshold value; and

means for subtracting the a demodulated signal from a selected preset default value to produce a dc offset estimate, means for deriving a mean dc offset estimate from a current dc offset estimate and a plurality of preceding dc offset estimates, and means for combining the mean dc offset estimate with the selected one of the plurality of threshold values and for applying the combined signal to a threshold input of the variable threshold bit slicer;

means for adjusting the responsiveness of the mean dc offset estimate with respect to drift; and

means for oversampling the demodulated signal by a factor M, where M is an integer on the order of 20, and means for intermittently integrating at least one sample in the vicinity of the M/2 sample of each of at least 2 bit periods of the demodulated signal to generate a signal to be compared with the selected one of the plurality of threshold values.

8. A receiver as claimed in claim 7 , further comprising: means for weighting the samples obtained by oversampling.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2011
From: NXP B.V.
To: CALLAHAN CELLULAR L.L.C.
Reel/Frame 027265/0798 →
CHANGE OF NAME Recorded Aug 31, 2011
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 026837/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 019719/0843 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2001
From: PAYNE, ADRIAN W.; MOORE, PAUL A.; MINNIS, BRIAN J.
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 012392/0634 →