IP Library › Assignment 026837/0649
Patent Assignment
Reel/Frame 026837/0649

CHANGE OF NAME

Recorded: 2011-08-31 Received: 2011-08-31 Pages: 5
Assignor
Assignee
NXP B.V.
HIGH TECH CAMPUS 60, EINDHOVEN, NLX, 5656 AG, NETHERLANDS
Covered Applications (90)
LOW VOLTAGE, HIGH-SPEED OUTPUT-STAGE FOR LASER OR MODULATOR DRIVING
App. No. 11/577,182
→
DATA PROCESSING SYSTEM AND METHOD FOR INTERCONNECT ARBITRATION
App. No. 11/630,599
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FLAT TUNER MODULE WITH A STANDARD CONNECTOR
App. No. 11/578,880
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CALIBRATING AMPLITUDE AND PHASE IMBALANCE AND DC OFFSET OF AN ANALOG I/Q MODULATOR IN A HIGH-FREQUENCY TRANSMITTER
App. No. 11/722,084
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DATA COMMUNICATION IN NETWORKS COMPRISING A PLURALITY OF NETWORK NODES AND AT LEAST ONE STAR NODE
App. No. 11/741,399
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RECEIVER FRONT-END SENSITIVITY BOOSTER
App. No. 10/552,831
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APPARATUS COMPRISING A CHARGE PUMP AND LCD DRIVER COMPRISING SUCH AN APPARATUS
App. No. 11/572,916
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METHOD AND APPARATUS FOR WRITING DATA TO AN OPTICAL DISC
App. No. 11/629,770
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METHOD OF DOWN-SAMPLING DATA VALUES
App. No. 11/587,028
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COMBINING SIGNAL-INTERFERENCE-RATIO (SIR) ESTIMATES FOR IMPROVED SIR ESTIMATION
App. No. 11/547,739
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VIDEO PROCESSING CIRCUIT AND METHOD OF VIDEO PROCESSING
App. No. 10/591,390
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ELECTRONIC STREAM PROCESSING CIRCUIT WITH LOCALLY CONTROLLED PARAMETER UPDATES, AND METHOD OF DESIGNING SUCH A CIRCUIT
App. No. 10/597,992
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DELAY FAULT TEST CIRCUITRY AND RELATED METHOD
App. No. 10/584,705
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INITIAL SYNCHRONIZATION FOR RECEIVERS
App. No. 10/572,473
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MEMORY ORGANIZATION ALLOWING SINGLE CYCLE POINTER ADDRESSING WHERE THE ADDRESS OF THE POINTER IS ALSO CONTAINED IN ONE OF THE MEMORY LOCATIONS
App. No. 10/566,514
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HIGH FREQUENCY COMPONENT
App. No. 10/565,934
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METHOD AND APPARATUS FOR COARSE AND FINE FREQUENCY AND TIMING SYNCHRONISATION
App. No. 10/563,926
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METHOD AND CIRCUIT ARRANGEMENT FOR THE SELF-TESTING OF A REFERENCE VOLTAGE IN ELECTRONIC COMPONENTS
App. No. 10/562,075
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METHOD FOR CANCELLING A NARROW-BAND INTERFERENCE SIGNAL
App. No. 10/561,459
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DATA PROCESSING CIRCUIT WITH MULTIPLEXED MEMORY
App. No. 10/560,450
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CONTROL SYSTEM FOR A VOLTAGE CONVERTER
App. No. 10/559,911
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LOW PASS FILTER AND ELECTRONIC DEVICE
App. No. 10/558,718
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CIRCUIT FOR GENERATING A HIGH-FREQUENCY OSCILLATION IN A SPECIFIED FREQUENCY BAND
App. No. 10/537,855
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CARRIER RECOVERY BASED DEMODULATION
App. No. 10/555,269
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ELECTRONICALLY CONTROLLABLE RF SWITCH
App. No. 10/550,346
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MULTILAYER STACK WITH COMPENSATED RESONANT CIRCUIT
App. No. 10/549,883
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Microstrip Filter of Short Length
App. No. 10/549,350
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DATA PROCESSING SYSTEM WITH PREFETCHING MEANS
App. No. 10/547,594
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CONTROL METHOD AND DEVICE FOR A DISPLAY DEVICE
App. No. 10/545,866
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ARRANGEMENT OF A CHEMICAL-MECHANICAL POLISHING TOOL AND METHOD OF CHEMICAL-MECHANICAL POLISHING USING SUCH A CHEMICAL-MECHANICAL POLISHING TOOL
App. No. 11/197,755
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TESTABLE CASCODE CIRCUIT AND METHOD FOR TESTING THE SAME USING A GROUP OF SWITCHING ELEMENTS
App. No. 10/509,863
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DECOUPLING MODULE FOR DECOUPLING HIGH-FREQUENCY SIGNALS FROM A VOLTAGE SUPPLY LINE
App. No. 10/536,236
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FREQUENCY-INDEPENDENT VOLTAGE DIVIDER
App. No. 10/531,603
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SYSTEM AND METHOD FOR MAINTAINING COHERENCY AND TRACKING VALIDITY IN A CHACHE HIEARCHY
App. No. 10/530,143
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TRANSITION DETECTION AT INPUT OF INTEGRATED CIRCUIT DEVICE
App. No. 10/525,579
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INTEGRATED CIRCUIT WITH TEST CIRCUIT
App. No. 10/506,234
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DUAL MODE TUNING ARRANGEMENT
App. No. 10/523,382
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SETTING THE SLICE LEVEL IN A BINARY SIGNAL
App. No. 10/522,470
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OPTICAL RECEIVER CIRCUIT
App. No. 10/520,314
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AUTOMATIC FREQUENCY CONTROL RECEIVER
App. No. 10/519,605
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TELEVISION RECEIVER WITH ISOLATED INPUTS
App. No. 10/519,062
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PULSE WIDTH MODULATION SIGNAL GENERATOR
App. No. 10/518,260
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CIRCUIT ARRANGEMENT FOR SHIFTING THE PHASE OF AN INPUT SIGNAL AND CIRCUIT ARRANGEMENT FOR SUPPRESSING THE MIRROR FREQUENCY
App. No. 10/508,456
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HIGH-FREQUENCY SIGNAL SWITCHING
App. No. 10/505,269
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READING CIRCUIT FOR READING A MEMORY CELL
App. No. 10/503,459
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ADDITIVE DC COMPONENT DETECTION INCLUDED IN AN INPUT BURST SIGNAL
App. No. 10/503,045
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PRINTED CIRCUIT BOARD CONFIGURABLE TELEVISION TUNER
App. No. 10/502,830
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ELECTRONIC CIRCUIT FOR CONVERTING A CURRENT SIGNAL TO A VOLTAGE SIGNAL
App. No. 10/502,154
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INTEGRATED CIRCUIT WITH SELF-TESTING CIRCUIT
App. No. 10/501,796
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TELEVISION SIGNAL RECEIVER WITH A UNIVERSAL OUTPUT FOR SURFACE-ACOUSTIC WAVE FILTERS OF DIFFERENT TYPES
App. No. 10/499,467
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DATA PROCESSING SYSTEM HAVING MULTIPLE PROCESSORS AND A COMMUNICATIONS MEANS IN A DATA PROCESSING SYSTEM
App. No. 10/498,596
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BALUN TRANSFORMER AND TRANSCEIVER
App. No. 10/497,336
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POWER SUPPLY RIPPLE REJECTION IN TUNER OSCILLATOR STAGE
App. No. 10/478,736
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METHOD FOR DETERMINING THE SIGNAL STRENGTH AT THE INPUT OF A TUNER
App. No. 10/496,553
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ENTRY LOCKING FOR LARGE DATA STRUCTURES
App. No. 10/494,823
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CIRCUIT CONFIGURATION FOR A GRADOMETRIC CURRENT SENSOR WITH A BRIDGE CIRCUIT FOR MEASURING GRADIENTS OF MAGNETIC FIELD STRENGTH AND A SENSOR CHIP EQUIPPED WITH THIS CIRCUIT CONFIGURATION
App. No. 10/489,122
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GRAPHICAL USER INTERFACE AND APPROACH THEREFOR
App. No. 10/794,991
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DATA PROCESSING DEVICE WITH A MEMORY LOCATION IN WHICH DATA IS STORED ACCORDING TO A WOM (WRITE ONCE MEMORY) CODE
App. No. 10/755,238
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LIMITING AMPLIFIER AND METHOD FOR AMPLIFYING AN INPUT SIGNAL
App. No. 10/657,428
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ACCESS TO A COLLECTIVE RESOURCE IN WHICH LOW PRIORITY FUNCTIONS ARE GROUPED, READ ACCESSES OF THE GROUP BEING GIVEN HIGHER PRIORITY THAN WRITE ACCESSES OF THE GROUP
App. No. 10/372,545
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CIRCUIT ARRANGEMENT FOR A CURRENT-CONTROLLED RESISTOR HAVING AN ENLARGED LINEAR RANGE
App. No. 10/369,943
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CIRCUIT ARRANGEMENT FOR A CURRENT-CONTROLLED RESISTOR HAVING AN ENLARGED LINEAR RANGE
App. No. 10/369,929
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CIRCUIT ARRANGEMENT FOR PULSE GENERATION
App. No. 10/352,743
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METHOD FOR MULTIPLYING TWO FACTORS FROM THE GALOIS FIELD AND MULTIPLIER FOR PERFORMING THE METHOD
App. No. 10/324,766
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ARRANGEMENT FOR ACTIVATING A DISPLAY DEVICE WITH VOLTAGE MULTIPLIER
App. No. 10/323,345
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DEVICE COMPRISING A SYMMETRICAL AMPLIFIER
App. No. 10/321,205
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RECEIVING CIRCUIT RECEIVING MESSAGE SIGNALS
App. No. 10/294,002
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ELECTRONIC DEVICE AND A CIRCUIT ARRANGEMENT
App. No. 10/257,207
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ARRANGEMENT WITH AN INTEGRATED CIRCUIT MOUNTED ON A BEARING MEANS AND A POWER SUPPLY MODULE ARRANGEMENT
App. No. 10/240,334
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METHOD OF MANUFACTURING AN INTEGRATED CIRCUIT, INTEGRATED CIRCUIT OBTAINED IN ACCORDANCE WITH SAID METHOD, WAFER PROVIDED WITH AN INTEGRATED CIRCUIT OBTAINED IN ACCORDANCE WITH THE METHOD, AND SYSTEM COMPRISING AN INTEGRATED CIRCUIT OBTAINED BY MEANS OF THE METHOD
App. No. 10/253,235
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ACTIVE TUNABLE FILTER CIRCUIT
App. No. 10/238,796
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DYNAMIC ACCESS CONTROL OF A FUNCTION TO A COLLECTIVE RESOURCE
App. No. 10/228,442
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TRANSMISSION LINES ARRANGEMENT
App. No. 10/198,494
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PACKET SWITCHING DEVICE WITH A FEEDBACK METHOD OF THE ARBITER
App. No. 10/179,359
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NON-LINEAR SIGNAL CORRECTION
App. No. 10/146,311
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SPEECH CODING SYSTEM
App. No. 10/116,550
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ACTIVE SWITCHING STAR NODE AND NETWORK OF STATIONS INTERCONNECTED BY SUCH A STAR NODE
App. No. 10/095,398
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MEMORY ADDRESS TRANSLATION FOR IMAGE PROCESSING
App. No. 10/043,536
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DRIVER CIRCUIT FOR A DISPLAY DEVICE
App. No. 10/042,444
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METHOD AND APPARATUS FOR DATA REPRODUCTION
App. No. 10/024,742
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RECEIVER HAVING A VARIABLE THRESHOLD SLICER STAGE AND A METHOD OF UPDATING THE THRESHOLD LEVELS OF THE SLICER STAGE
App. No. 10/015,848
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DEVICE FOR COMPARISON OF FREQUENCIES WITH LOW TEMPORAL INERTIA
App. No. 09/995,470
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MEANS FOR COMPENSATING A DATA-DEPENDENT SUPPLY CURRENT IN AN ELECTRONIC CIRCUIT
App. No. 09/962,649
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CIRCUIT ARRANGEMENT
App. No. 09/960,099
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SYNCHRONIZATION OF NON-SEQUENTIAL MOVING POINTERS
App. No. 09/941,478
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SEMICONDUCTOR DEVICE
App. No. 09/860,358
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METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE
App. No. 09/829,796
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ON CHIP CURRENT SOURCE
App. No. 09/828,064
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RESOLUTION OF MEDIA ACCESS CONTENTIONS IN NETWORKS COMPRISING A PLURALITY OF NETWORK NODES AND AT LEAST ONE STAR MODE
App. No. 09/826,700
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DATA CLOCKED RECOVERY CIRCUIT
App. No. 09/799,828
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