Low voltage, high-speed output-stage for laser or modulator driving
View Patent ↗The present invention provides a driving circuit ( 100 ) in particular for driving a laser diode ( 700 ) or a modulator, at data speed in the order of Gb/s. The driving circuit ( 10 ) has a low-voltage, high-speed output stage capable of driving efficiently a laser diode ( 700 ) or a modulator The driver circuit ( 10 ) comprises a chain of circuits, said chain comprising a slew-rate control circuit, at least one translinear amplifier ( 200, 201, 202 ), a push/pull stage ( 300 ), and an output stage ( 400 ) for driving the load current. Due to its versatility, the driver can be used in other applications e.g. line drivers, cable drivers, high-speed serial interfaces for back-plane interconnect, etc. The driver can work at low supply voltages, e.g. 3.3V nominal down to 2.7V, with high power efficiency. One major clue is to use entirely the large signal current produced by the output stage, e.g. in the driven laser diode, without wasting current in supply lines.
1. A driver circuit for driving a load current at an output node according to a balanced driving pulse signal, said driver circuit comprising:
a slew-rate controller that adds current pulses for rising and falling edges of said balanced driving pulse signal;
at least one amplifier coupled to said slew-rate controller; and
an output device that receives said balanced driving pulse signal from said at least one amplifier, said output device further comprising:
an output transistor that modulates said load current, and
an impedance device that determines an output impedance of said output device, said impedance device being connected to said output node and further comprising:
a current controller that substantially suppresses a current from said output node into said impedance device.
2. The driver circuit of claim 1 , wherein said impedance device further comprises:
an impedance element coupled between said output node and a floating node, wherein said current controller further comprises:
a feedback device that controls a potential of said floating node to match a potential of said output node, and
a feedforward device that adjusts said potential of said floating node corresponding to said potential of said output node onto a transition of said balanced driving pulse signal.
3. The driver circuit of claim 2 , wherein said impedance device further comprises:
a replica transistor that sends a small current replica to said output transistor and has a predetermined current ratio to said output transistor.
4. The driver circuit of claim 2 , wherein said impedance element comprises at least one of a fixed resistor and a tunable resistor.
5. The driver circuit of claim 1 , further comprising:
a push/pull driver that converts the balanced driving pulse signal into an unbalanced driving pulse signal, said push/pull driver being coupled between said at least one amplifier and said output device.
6. The driver circuit of claim 1 , wherein said at least one amplifier further comprises:
an active load; and
a dc feedback loop that controls a predetermined dc component of said balanced driving pulse signal at an output of said at least one amplifier by adjusting a bias of said active load.
7. The driver circuit of claim 6 , wherein said dc feedback loop further comprises:
a pair of feedback transistors connected to a constant current source which supplies a bias current to said active load for drawing off a current from said constant current source corresponding to said predetermined dc component of said balanced driving pulse signal.
8. The driver circuit of claim 1 , further comprising:
at least two amplifiers connected in cascade and being up-scaled in current towards the output device.
9. The driver circuit of claim 1 , wherein said slew-rate controller further comprises:
a balanced input and a balanced output for said balanced driving pulse signal each having respective first and second input nodes and output nodes, respectively, and having a current injector that injects a predetermined positive amount of current to said balanced driving pulse signal at an output node during a rising edge of said balanced driving pulse signal and injects a predetermined negative amount of current to said balanced driving pulse signal at a output node during a falling edge of said balanced driving pulse signal.
10. The driver circuit of claim 9 , wherein said current injector further comprises:
a differentiator that creates current pulses, and
respective first and second current pulse amplifiers coupled to respective current sources that provide respective substantially constant currents, said first and second current pulse amplifiers injecting at said output node predetermined current pulses during transitions of said balanced driving pulse signal.
11. The driver circuit of claim 10 , wherein said respective substantially constant currents are adjustable.
12. The driver circuit of claim 1 , wherein said output device is connected to at least one of a laser diode and a modulator circuit.
13. The driver circuit of claim 1 , wherein the driver circuit is implemented in at least one of a laser driver, a line driver, a cable driver, and a high-speed serial interface for a back-plane interconnect.
14. A method for high-speed driving a load current to a switching element, comprising:
generating a pulsed driving signal having rising and falling edges;
conditioning the pulsed driving signal by adding current pulses to said falling and rising edges of said pulsed driving signal to generate a conditioned pulsed driving signal;
amplifying said conditioned pulsed driving signal; and
switching the switching element by applying said amplified conditioned pulsed signal.
15. The method of claim 14 , further comprising:
adjusting the current pulses obtained in the conditioning step for compensating a parasitic capacity of said switching element.
16. The driver circuit of claim 2 , wherein the feedback device further comprises an operational amplifier.
17. The driver circuit of claim 2 , wherein the feedback device controls a potential of the floating node to match a potential of the output node.
18. The driver circuit of claim 2 , wherein the feedforward device suppresses alternating currents in the balanced driving pulse signal.
19. The driver circuit of claim 5 , wherein the push/pull driver further comprises an emitter path resistor that provides a bias voltage corresponding to a dc component of the balanced driving pulse signal.
20. The driver circuit of claim 1 , wherein the slew-rate controller is externally programmable.
21. The driver circuit of claim 10 , wherein the differentiator comprises a capacitor that causes current spikes during each transition of the balanced driving pulse signal.
22. The driver circuit according to claim 4 , wherein said impedance element is a fixed resistor.
23. The driver circuit of claim 4 , wherein said impedance element is a tunable resistor.
24. The method of claim 14 , wherein the rising edges and the falling edges have respective slew rates, and further comprising
generating a current pulse during each rising edge and during each falling edge, each current pulse having a respective magnitudes based, at least in part, on the respective slew rate.