IP Library Granted Patent US 7,689,781
Granted Patent B2
US 7,689,781 · App. 10/372,545 · Granted Mar 30, 2010

Access to a collective resource in which low priority functions are grouped, read accesses of the group being given higher priority than write accesses of the group

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Quick Facts
Patent No.
US 7,689,781
App. No.
10/372,545
Granted
Mar 30, 2010
Kind
B2
Abstract

The invention relates to a functional system comprising a set of functions (F, F′) which are to access a collective resource (RSRC), the system including an interface (INT) arranged to implement an access scheme (AS) including at least one state (I) defined by an order of priority for an arbitration according to which the functions (F, F′) can access the collective resource (RSRC), the state (I) being characterized in that, for at least one set of at least two functions (F), the access possibilities in read mode (F_R) and the access possibilities in write mode (F_W) have different priority levels, the access possibilities in read mode having consecutive priority levels higher than the priority levels of the access possibilities in write mode.

Claims (29)

1. A method of managing access to a collective resource, the method comprising:

collecting, by an arbitrator, a plurality of access requests for accessing the collective resource; and

performing, by a fixed-priority selector and a process selector included in the arbitrator, an arbitration function using a fixed-priority order to determine which access request to grant access to the collective resource, the step of performing the arbitration function comprising:

selecting, by the process selector, a single access request from the plurality of access requests, the process selector using a first selection process to select the single access request when the plurality of access requests consists only of access requests possessing a lowest priority level, the lowest priority level comprising latency-insensitive, noncritical processes in write mode,

forwarding, by the process selector, the selected single access request to the fixed-priority selector, and

granting, by the fixed-priority selector, access to the collective resource for a single access request from the plurality of access requests, the fixed-priority selector using a second selection process to select the single access request possessing a highest priority level using the fixed-priority order.

2. The method of claim 1 , wherein the highest priority level includes latency-sensitive and latency-insensitive critical processes requesting access to the collective resource.

3. The method of claim 1 , wherein the step of selecting, by the process selector, further comprises:

using a register to select the single access request, wherein the process selector uses a register value to select the single access request.

4. The method of claim 3 , further comprising:

incrementing, by the process selector, the register value when the latency-insensitive, noncritical process in write-mode corresponding to the register value does not require access to the shared memory; and

determining, by the process selector, whether a single access request based on the incremented register value requires access to the shared memory.

5. An arbitrator for managing access to a collective resource, the arbitrator comprising:

a process selector for selecting a single access request from a plurality of access requests, the process selector using a first selection process to select the single access request when the plurality of access requests consists only of access requests possessing a lowest priority in a fixed-priority order, the lowest priority level comprising latency-insensitive noncritical processes in write mode, and

a fixed-priority selector for granting access to the collective resource for a single access request from the plurality of access requests, the fixed-priority selector using a second selection process to select an access request using the fixed-priority order, wherein the fixed-priority selector selects the access request possessing a highest priority,

wherein an output of the process selector is a lowest priority input of the fixed-priority selector.

6. The arbitrator of claim 5 , wherein the highest priority level includes latency-sensitive and latency-insensitive critical processes requesting access to the collective resource.

7. The arbitrator of claim 5 , further comprising:

a register for selecting a single access request, wherein the process selector uses a register value to select the single access request.

8. The arbitrator of claim 7 , wherein the process selector increments the register value when the latency-insensitive, noncritical process in write-mode corresponding to the register value does not require access to the shared memory and determines whether a single access request based on the incremented register value requires access to the shared memory.

9. A system for managing access to a collective resource, the system comprising:

a process selector for selecting a single access request from a plurality of access requests, the process selector using a first selection process to select the single access request when the plurality of access requests consists only of access requests possessing a lowest priority in a fixed-priority order, the lowest priority level comprising latency-insensitive noncritical processes in write mode, and

a fixed-priority selector for granting access to the collective resource for a single access request from the plurality of access requests, the fixed-priority selector using a second selection process to select an access request using the fixed-priority order, wherein the fixed-priority selector selects the access request possessing a highest priority,

wherein an output of the process selector is a lowest priority input of the fixed-priority selector; and

an access interface for processing access requests received from the arbitrator and sending the access requests to the collective resource in order of receipt from the arbitrator.

10. The system of claim 9 , wherein the highest priority level includes latency-sensitive and latency-insensitive critical processes requesting access to the collective resource.

11. The system of claim 9 , further comprising:

a register for selecting a single access request, wherein the process selector uses a register value to select the single access request.

12. The system of claim 11 , wherein the process selector increments the register value when the latency-insensitive, noncritical process in write-mode corresponding to the register value does not require access to the shared memory and determines whether a single access request based on the incremented register value requires access to the shared memory.

Assignments (5)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE FOR INVENTOR ERIC DESMICHT PREVIOUSLY RECORDED ON REEL 014120 FRAME 0587. ASSIGNOR(S) HEREBY CONFIRMS THE EXECUTION DATE FOR INVENTOR ERIC DESMICHT IS 04/08/2003, NOT 03/12/2003. Recorded May 29, 2012
From: DE PERTHUIS, HUGUES; DESMICHT, ERIC
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 028280/0410 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2011
From: NXP B.V.
To: CALLAHAN CELLULAR L.L.C.
Reel/Frame 027265/0798 →
CHANGE OF NAME Recorded Aug 31, 2011
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 026837/0649 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 019719/0843 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2003
From: DE PERTHUIS, HUGUES; DESMICHT, ERIC
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 014120/0587 →