IP Library Granted Patent US 7,068,117
Granted Patent B2
US 7,068,117 · App. 10/478,736 · Granted Jun 27, 2006

Power supply ripple rejection in tuner oscillator stage

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Quick Facts
Patent No.
US 7,068,117
App. No.
10/478,736
Granted
Jun 27, 2006
Kind
B2
Abstract

A bipolar transistor (Tr) in an oscillator stage of a tuner is provided with a diode (D 10 ) in series with a resistor (R 11 ) coupled between the base of the transistor (Tr) and the reference voltage to which the emitter of the transistor (Tr) is coupled. The diode (D 10 ) allows a decreased resistor (R 11 ) value which causes the supply voltage ripple (Vr 1 ) on the collector originating from the base to decrease so as to better compensate the supply ripple (Vr 2 ) on the collector directly originating from the supply voltage (Vs.).

Claims (10)

1. A method of suppressing supply voltage ripple in an output of a tuner oscillator stage, the tuner oscillator stage comprising:

a transistor having a control electrode, and two electrodes of a main current path,

a first impedance being coupled between the control electrode and a first terminal,

a second impedance being coupled between the control electrode and a second terminal,

a third impedance being coupled between one of the two electrodes of the main current path and the second terminal, and

an element being arranged in series with the second impedance, the element having a low impedance for AC current and a well-defined voltage drop for DC current, the first and the second terminal being arranged to receive a power supply voltage, the method comprising the steps of:

allowing a first ripple occurring in a power supply voltage at the first terminal to be applied to said control electrode of said transistor, whereby said transistor passes said first ripple; and

combining, at an output of said tuner oscillaton stage, said first ripple with a second ripple occurring in a power supply voltage supplied to said main current path, whereby said first ripple and said second ripple have opposite signs and compensate for each other.

2. The method as claimed in claim 1 , wherein the transistor is a bipolar transistor having a base, a collector and an emitter, the first impedance being coupled between the base and the first terminal, the second impedance being coupled between the base and the second terminal, a collector impedance being coupled between the collector and a third terminal, the third impedance being coupled between the emitter and the second terminal, and the element being arranged in series with the second impedance.

3. A method as claimed in claim 1 , wherein the element comprises a diode, which is poled to conduct in operation.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 22, 2011
From: NXP B.V.
To: CALLAHAN CELLULAR L.L.C.
Reel/Frame 027265/0798 →
CHANGE OF NAME Recorded Aug 31, 2011
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 026837/0649 →
CORRECTIVE ASSIGNMENT TO CORRECT THE AND REMOVE THE ASSIGNMENT RECORDED AGAINST PATENT NO. 2,068,117 AND RE-RECORD THE ASSIGNMENT AGAINST PATENT NO. 7,068,117 PREVIOUSLY RECORDED ON REEL 018635 FRAME 0787. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 8, 2008
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 020909/0782 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 24, 2003
From: TOH, YEOW TENG; VAN DER WIJST, HENDRICUS MARTINUS; KWONG, KAM CHOON
To: KONINKLIJKE PHILIPS ELECTRONICS N.V.
Reel/Frame 015264/0145 →