IP Library Granted Patent US 6,879,046
Granted Patent B2
US 6,879,046 · App. 10/038,371 · Granted Apr 12, 2005

Split barrier layer including nitrogen-containing portion and oxygen-containing portion

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Quick Facts
Patent No.
US 6,879,046
App. No.
10/038,371
Granted
Apr 12, 2005
Kind
B2
Abstract

A split barrier layer enables copper interconnect wires to be used in conjunction with low-k dielectric films by preventing the diffusion of N—H base groups into photoresists where they can render the photoresist insoluble. The split barrier layer is disposed between the copper and the low-k dielectric and includes a nitrogen-containing, oxygen-free film which contacts the copper, and an oxygen-containing, nitrogen-free film which contacts the low-k dielectric film. The nitrogen-containing film prevents the formation of undesirable copper oxides, and the oxygen-containing film prevents the diffusion of N—H base groups into the low-k dielectric films. The oxygen-containing film may be an oxygen-doped silicon carbide film in an exemplary embodiment. In another embodiment, a film stack of low-k dielectric films includes an etch-stop layer and hardmask each formed of oxygen-doped silicon carbide. The hardmask and etch-stop layer enable the formation of a dual-damascene opening in the film stack, and the film structure of the present invention precludes N—H base groups from diffusing from the low-k dielectric films and neutralizing acid catalysts in the photoresist used to define the dual damascene opening.

Claims (27)

1. A semiconductor product comprising a barrier layer disposed between a copper-containing structure and a low-k dielectric film, said barrier layer comprising a composite film structure including a nitrogen-containing, substantially oxygen-free first film forming a boundary with said copper-containing structure and an oxygen-containing, substantially nitrogen-free second film forming a boundary with said low-k dielectric film in which said first film comprises nitrogen-doped silicon carbide and said second film comprises oxygen-doped silicon carbide.

2. The semiconductor product as in claim 1 , in which said copper-containing structure comprises a surface including a copper wire formed within an insulating material.

3. The semiconductor product as in claim 1 , in which said barrier layer is formed on said copper-containing structure and said low-k dielectric film is formed on said barrier layer.

4. The semiconductor product as in claim 3 , further comprising an oxygen doped silicon carbide film formed over said low-k dielectric film, a further low k dielectric film formed over said oxygen-doped silicon carbide film and an oxygen-doped silicon carbide hardmask formed over said further low-k dielectric film.

5. The semiconductor product as in claim 4 , in which said semiconductor product includes a two-tiered opening extending down from a top surface of said oxygen-doped silicon carbide hardmask, said two-tiered opening including a wider upper portion extending through said oxygen-doped silicon carbide hardmask, said further low-k dielectric film, and said oxygen doped silicon carbide film, and a lower, narrower portion extending through said low-k dielectric film, said second film, and said first film.

6. The semiconductor product as in claim 1 , wherein said low-k dielectric film is formed of SiOC—H.

7. The semiconductor product as in claim 1 , wherein said low-k dielectric film has a dielectric constant less than 3.5.

8. A semiconductor product comprising a barrier layer disposed between a readily-oxidizable conductive material and a low-k dielectric film, said barrier layer comprising a composite film structure including a nitrogen-containing, substantially oxygen-free first film forming a boundary with said conductive material and an oxygen-containing, substantially nitrogen-free second film forming a boundary with said low-k dielectric film, each of said first film and said second film formed of silicon carbide.

9. A semiconductor product comprising a film stack including:

a lower low-k dielectric film;

an etch-stop layer formed over said low-k dielectric film;

an upper low-k dielectric film formed over said etch-stop layer; and

a hardmask layer formed over said upper low-k dielectric film, each of said etch-stop layer and said hardmask layer formed of oxygen-doped silicon carbide.

10. The semiconductor product as in claim 9 , in which said film stack includes a two-tiered opening formed therein, said two-tiered opening including a wider upper portion disposed over a narrower lower portion,

said narrower lower portion extending through said lower low-k dielectric film,

said wider upper portion extending through said etch-stop layer, said upper low-k dielectric film and said hardmask layer, and

said two-tiered opening filled with a conductive material.

11. The semiconductor product as in claim 10 , further comprising a composite film structure formed beneath said lower low-k dielectric film and including a nitrogen-doped silicon carbide film formed beneath an oxygen-doped silicon carbide film, and wherein said narrower lower portion further extends through said composite film structure and said two-tiered opening extends to a bottom surface formed of a further conductive material.

12. The semiconductor product as in claim 11 , wherein said further conductive material comprises copper.

13. A semiconductor product comprising a film stack including:

a copper-containing surface;

a nitrogen-containing first barrier layer disposed over said copper-containing surface;

an oxygen-doped, substantially nitrogen-free second barrier layer disposed over said first barrier layer;

a first low-k dielectric film disposed on said second barrier layer;

an oxygen-doped silicon carbide etch-stop layer disposed over said first low-k dielectric film;

a second low-k dielectric film disposed over said etch-stop layer; and

an oxygen-doped silicon carbide hardmask film disposed over said second low-k dielectric film.

Assignments (11)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2022
From: CORTLAND CAPITAL MARKET SERVICES LLC
To: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
Reel/Frame 059720/0719 →
SECURITY INTEREST Recorded Feb 1, 2018
From: HILCO PATENT ACQUISITION 56, LLC; BELL SEMICONDUCTOR, LLC; BELL NORTHERN RESEARCH, LLC
To: CORTLAND CAPITAL MARKET SERVICES LLC, AS COLLATERAL AGENT
Reel/Frame 045216/0020 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2017
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.; BROADCOM CORPORATION
To: BELL SEMICONDUCTOR, LLC
Reel/Frame 044886/0608 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035059/0001 →
MERGER Recorded Feb 20, 2015
From: AGERE SYSTEMS GUARDIAN CORP.
To: AGERE SYSTEMS INC.
Reel/Frame 035058/0884 →
MERGER Recorded Feb 20, 2015
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 035058/0895 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2002
From: GIBSON JR., GERALD W.; JESSEN, SCOTT; LYTLE, STEVEN ALAN; STEINER, KURT GEORGE; VITKAVAGE, SUSAN CLAY
To: AGERE SYSTEMS GUARDIAN CORP.
Reel/Frame 012863/0055 →