IP Library Granted Patent US 6,921,719
Granted Patent B2
US 6,921,719 · App. 10/065,589 · Granted Jul 26, 2005

Method of preparing whole semiconductor wafer for analysis

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Quick Facts
Patent No.
US 6,921,719
App. No.
10/065,589
Granted
Jul 26, 2005
Kind
B2
Abstract

A method for preparing a semiconductor wafer for whole wafer backside inspection is disclosed. The frontside of the wafer is covered with a protective frontside substrate and the backside portion of the wafer is thinned using conventional techniques. The whole wafer backside is then polished and a backside substrate, preferably of transparent material is juxtaposed to the backside of the wafer, such as with an adhesive or with a frame. The frontside substrate is then removed, exposing electronic devices for device inspection. The backside of the wafer is maintained open or available to backside inspection such as emission microscopy techniques used to detect defects which emit light.

Claims (39)

1. A method of preparing a whole wafer of semiconductor material, having opposed front and back sides with respective surfaces and having at least one electronic device, comprising the steps of:

covering the frontside of the wafer with a whole wafer frontside substrate;

supporting the whole wafer with a whole wafer support coupled to the whole wafer frontside substrate, with the whole wafer frontside substrate protecting said at least one electronic device;

said whole wafer including a whole wafer substrate having an initial thickness and which includes said whole wafer backside;

thinning the whole wafer substrate, reducing its thickness to expose a new whole wafer backside surface at the backside of the whole wafer;

strengthening and rigidifying at least a portion of the new whole wafer backside surface to strengthen and rigidify at least a portion of the whole wafer; and

removing the whole wafer frontside substrate, exposing said a least one electronic device while maintaining the strengthening and rigidifying of at least the portion of the new whole wafer backside surface to strengthen and rigidify at least the portion of the whole wafer.

2. The method of claim 1 wherein the strengthening and rigidifying at least the portion of the new whole wafer backside surface comprises:

providing a whole wafer backside substrate; and

attaching the whole wafer backside substrate to at least the portion of the new whole wafer backside surface to strengthen and rigidify the whole wafer.

3. The method of claim 2 further comprising the step of polishing the backside of the whole wafer prior to attaching the whole wafer backside substrate.

4. The method of claim 1 further comprising the steps of providing an inspection carrier and attaching the inspection carrier to the wafer to support the wafer for access of inspection instruments to both the frontside and the backside of the whole wafer.

5. The method of claim 1 wherein the step of thinning the whole wafer substrate comprises grinding the whole wafer substrate to expose the new whole wafer backside surface.

6. The method of claim 5 wherein the step of thinning the whole wafer substrate comprises grinding the whole wafer substrate to expose the new whole wafer backside surface using full pad fixed abrasive grinding.

7. The method of claim 5 wherein the step of grinding the whole wafer substrate includes providing a backside grinder with a grind chuck and securing the whole wafer to the grind chuck.

8. The method according to claim 7 wherein the grind chuck includes a vacuum chuck for securing the wafer using vacuum forces.

9. The method of claim 2 wherein the whole wafer backside substrate is comprised of substantially transparent material and said step of attaching said whole wafer backside substrate to said whole wafer backside surface maintains the transparency of the whole wafer backside substrate so as to allow substantially transparent visual observation of said at least one electronic device from the backside of the wafer.

10. The method of claim 9 further comprising the step of performing failure analysis by inspecting the wafer backside utilizing emission microscopy to detect defects in said at least one electronic device which emits light.

11. The method of claim 2 wherein the step of attaching said backside substrate to said whole wafer backside surface comprises attaching said backside substrate with an adhesive.

12. The method of claim 2 wherein the step of attaching said backside substrate to said whole wafer backside surface comprises attaching said backside substrate with a substantially translucent adhesive.

13. The method of claim 2 wherein the step of attaching said backside substrate to said whole wafer backside surface comprises attaching said backside substrate with a substantially transparent adhesive.

14. The method of claim 13 wherein the adhesive is UV curable and said method further comprises the step of UV curing the adhesive.

15. The method of claim 2 wherein the step of attaching said backside substrate to said whole wafer backside surface comprises attaching said backside substrate with a substantially opaque adhesive.

16. The method of claim 1 wherein the step of supporting with said whole wafer support comprises engaging the edge of said whole wafer with an edge-frame holder to provide handling strength after backside thinning.

17. The method of claim 1 wherein said thinning step comprises etching the backside of said whole wafer wing focused ion-beam etching techniques.

18. The method of claim 1 wherein the step of covering the frontside of the wafer with a whole wafer frontside substrate comprises attaching the whole wafer frontside substrate to the frontside of the wafer with an adhesive.

19. The method of claim 18 further comprising the step of cleaning the frontside of the wafer after removing the whole wafer frontside substrate.

20. The method of claim 2 wherein the new whole wafer backside surface has a size and the whole wafer backside substrate is sized with a smaller size and the step of attaching comprises attaching the whole wafer backside substrate to a portion of said new whole wafer backside surface.

21. The method of claim 1 wherein said whole wafer frontside substrate is substantially rigid.

22. The method of claim 1 wherein said whole wafer frontside substrate is substantially flexible.

23. The method of claim 1 wherein said whole wafer frontside substrate is vacuum-porous.

24. A method of preparing a whole semiconductor wafer having opposed front and back sides with respective surfaces and having at least one electronic device, comprising the steps of:

covering the frontside of the wafer wit a whole wafer frontside substrate;

supporting the whole wafer frontside substrate in a vacuum chuck, with the whole wafer frontside substrate protecting said at least one electronic device;

said whole wafer including a whole wafer substrate having an initial thickness and which includes said whole wafer backside;

thinning the whole wafer substrate, reducing its thickness by grinding the wafer substrate to expose a ground surface at the backside of the whole wafer;

polishing the backside of the whole wafer to provide a new whole wafer backside substrate surface;

attaching the whole wafer backside substrate to the new whole wafer backside surface to strengthen and rigidify the whole wafer; and

removing the whole water frontside substrate, exposing said at least one electronic device while maintaining the attachment of the whole wafer backside substrate to the whole wafer backside surface to strengthen and rigidify the whole wafer.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded May 10, 2022
From: AGILITY CAPITAL, LLC
To: STRASBAUGH
Reel/Frame 059913/0938 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 8, 2017
From: BFI BUSINESS FINANCE DBA CAPITALSOURCE BUSINESS FINANCE GROUP
To: REVASUM, INC.
Reel/Frame 041909/0687 →
SECURITY INTEREST Recorded Mar 7, 2017
From: STRASBAUGH AND R.H. STRASBAUGH
To: BFI BUSINESS FINANCE DBA CAPITALSOURCE BUSINESS FINANCE GROUP
Reel/Frame 041904/0158 →