Current sensing echo cancellation device

1. A passive echo cancellation circuit for reducing echoes on a subscriber line, comprising:

an output driver adapted to drive a downstream signal on the subscriber line;

a first sensing circuitry coupled to the output driver and being adapted to sense a current on the subscriber line to generate a first voltage;

a balancing network adapted to receive at least a portion of the downstream signal;

a second sensing circuitry adapted to sense a current in the portion of the downstream signal passing through the balancing network to generate a second voltage; and

an upstream driver adapted to subtract the second voltage from the first voltage to generate an upstream signal.

2. The circuit of claim 1 , wherein the balancing network comprises a balancing load corresponding to an expected load on the subscriber line.

3. The circuit of claim 2 , wherein the balancing network further comprises a protection resistor.

4. The circuit of claim 1 , wherein the output driver, first and second sensing circuitries, and upstream driver are contained in a subscriber line interface circuit chip.

5. The circuit of claim 4 , wherein the balancing network is external to the subscriber line interface circuit chip.

6. The circuit of claim 1 , wherein the first sensing circuitry comprises a sensing resistor coupled between the output driver and the subscriber line.

7. The circuit of claim 6 , wherein an output terminal of the sensing resistor is coupled to the upstream driver to provide the first voltage.

8. The circuit of claim 1 , wherein the second sensing circuitry comprises a sensing resistor coupled between the output driver and the balancing network.

9. The circuit of claim 8 , wherein an output terminal of the sensing resistor is coupled to the upstream driver to provide the second voltage.

10. The circuit of claim 1 , wherein the first sensing circuitry comprises a first sensing resistor coupled between the output driver and the subscriber line, an output terminal of the resistor is coupled to the upstream driver to provide the first voltage, the second sensing circuitry comprises a second sensing resistor coupled between the output driver and the balancing network, and an output terminal of the second sensing resistor is coupled to the upstream driver to provide the second voltage.

11. The circuit of claim 4 , wherein the subscriber line interface circuit chip comprises an output terminal coupled to the subscriber line, and the circuit further comprises a protection resistor coupled between the output terminal and the subscriber line.

12. A line card for coupling to a subscriber line, comprising:

a balancing network; and

a subscriber line interface circuit adapted to drive a downstream signal on the subscriber line and receive an upstream signal on the subscriber line, the subscriber line interface circuit comprising:

a first output terminal coupled to the subscriber line;

an output driver coupled to the output terminal and adapted to drive the downstream signal on the subscriber line;

first sensing circuitry coupled to the output driver adapted to sense a current on the subscriber line to generate a first voltage;

a second output terminal coupled to the balancing network to provide at least a portion of the downstream signal to the balancing network;

second sensing circuitry adapted to sense a current in the portion of the downstream signal passing through the balancing network to generate a second voltage; and

an upstream driver adapted to subtract the second voltage from the first voltage to generate the upstream signal.

13. The line card of claim 12 , wherein the balancing network comprises a balancing load corresponding to an expected load on the subscriber line.

14. The line card of claim 13 , wherein the balancing network further comprises a protection resistor.

15. The line card of claim 12 , wherein the first sensing circuitry comprises a sensing resistor coupled between the output driver and the subscriber line.

16. The line card of claim 12 , wherein the second sensing circuitry comprises a sensing resistor coupled between the output driver and the balancing network.

17. The line card of claim 16 , wherein an output terminal of the sensing resistor is coupled to the upstream driver to provide the second voltage.

18. The line card of claim 12 , wherein the first sensing circuitry comprises a first sensing resistor coupled between the output driver and the subscriber line, an output terminal of the resistor is coupled to the upstream driver to provide the first voltage, the second sensing circuitry comprises a second sensing resistor coupled between the output driver and the balancing network, and an output terminal of the sensing resistor is coupled to the upstream driver to provide the second voltage.

19. The line card of claim 12 , subscriber line interface circuit further comprises a protection resistor coupled between the second output terminal and the subscriber line.

20. The line card claim 12 , wherein the subscriber line interface circuit further comprises an amplifier coupled to the echo cancellation circuit and being adapted to amplify the upstream signal.

21. A method for canceling echoes on a subscriber line, comprising:

driving a downstream signal on the subscriber line;

sensing a current on the subscriber line to generate a first voltage;

providing a portion of the downstream signal to a balancing network;

sensing a current in the portion of the downstream signal passing through the balancing network to generate a second voltage; and

subtracting the second voltage from the first voltage to generate an upstream signal.

22. The method of claim 21 , further comprising providing a balancing load of the balancing network corresponding to an expected load on the subscriber line.

23. The method of claim 22 , wherein providing the balancing network further comprises providing a protection resistor.

24. The method of claim 21 , wherein driving the downstream signal comprises driving the downstream signal with an output driver.

25. The method of claim 24 , wherein sensing the current on the subscriber line comprises providing a sensing resistor between the output driver and the subscriber line.

26. The method of claim 25 , wherein sensing the current on the subscriber line comprises coupling an output terminal of the sensing resistor to an upstream driver to provide the first voltage.

27. The method of claim 24 , wherein sensing the current in the portion of the downstream signal passing through the balancing network comprises providing a sensing resistor between the output driver and the balancing network.

28. The method of claim 27 , wherein sensing the current in the portion of the downstream signal passing through the balancing network comprises coupling an output terminal of the sensing resistor to an upstream driver to provide the second voltage.

29. The method of claim 24 , wherein sensing the current on the subscriber line comprises providing a first sensing resistor coupled between the output driver and the subscriber line, an output terminal of the resistor being coupled to an upstream driver to provide the first voltage, and sensing the current in the portion of the downstream signal passing through the balancing network comprises providing a second sensing resistor coupled between the output driver and the balancing network, an output terminal of the second sensing resistor being coupled to the upstream driver to provide the second voltage.

30. The method of claim 29 , wherein providing the second sensing resistor comprises providing the second sensing resistor having a resistance equal to a multiple of the resistance of first sensing resistor.

31. The method of claim 30 , wherein providing the second sensing resistor comprises providing the second sensing resistor having a resistance equal to about 100 times the resistance of first sensing resistor.

32. The method of claim 21 , further comprising amplifying the upstream signal.

33. A passive echo cancellation circuit for reducing echoes on a subscriber line having first and second differential lines, comprising:

a first output driver coupled to the first differential line and being adapted to drive a first component of a downstream signal on the first differential line;

a second output driver coupled to the second differential line and being adapted to drive a second component of the downstream signal on the second differential line;

first sensing circuitry coupled to the first output driver and being adapted to sense a current on the first differential line to generate a first voltage;

second sensing circuitry coupled to the second output driver and being adapted to sense a current on the second differential line to generate a second voltage;

a balancing network coupled between the first and second differential lines and being adapted to receive at least a portion of the downstream signal;

third sensing circuitry adapted to sense a current in the portion of the first component of the downstream signal passing through the balancing network to generate a third voltage; and

fourth sensing circuitry adapted to sense a current in the portion of the second component of the downstream signal passing through the balancing network to generate a fourth voltage;

a first upstream driver adapted to subtract the third voltage from the first voltage to generate a first differential component of an upstream signal; and

a second upstream driver adapted to subtract the fourth voltage from the second voltage to generate a second differential component of the upstream signal.

34. The circuit of claim 33 , wherein the balancing network comprises a balancing load corresponding to an expected load on the subscriber line.

35. The circuit of claim 34 , wherein the balancing network further comprises a protection resistor.

36. The circuit of claim 33 , wherein the first and second output drivers, first, second, third, and fourth sensing circuitries, and the first and second upstream drivers are contained in a subscriber line interface circuit chip.

37. The circuit of claim 36 , wherein the balancing network is external to the subscriber line interface circuit chip.

38. The circuit of claim 33 , wherein the first sensing circuitry comprises a first sensing resistor coupled between the first output driver and the first differential line, and the second sensing circuitry comprises a second sensing resistor coupled between the second output driver and the second differential line.

39. The circuit of claim 38 , wherein an output terminal of the first sensing resistor is coupled to the first upstream driver to provide the first voltage, and an output terminal of the second sensing resistor is coupled to the second upstream driver to provide the second voltage.

40. The circuit of claim 33 , wherein the third sensing circuitry comprises a first sensing resistor coupled between the first output driver and the balancing network, and the fourth sensing circuitry comprises a second sensing resistor coupled between the second output driver and the balancing network.

41. The circuit of claim 40 , wherein an output terminal of the first sensing resistor is coupled to the first upstream driver to provide the third voltage, and an output terminal of the second sensing resistor is coupled to the second upstream driver to provide the fourth voltage.

42. A passive echo cancellation circuit for reducing echoes on a subscriber line having first and second differential lines, comprising:

a first output driver coupled to the first differential line and being adapted to drive a first component of a downstream signal on the first differential line;

a second output driver coupled to the second differential line and being adapted to drive a second component of the downstream signal on the second differential line;

a first sensing resistor coupled to the first output driver;

a second sensing resistor coupled to the second output driver;

a balancing network coupled between the first and second differential lines;

a third sensing resistor coupled between the first output driver and the balancing network;

a fourth sensing resistor coupled between the second output driver and the balancing network;

a first upstream driver coupled to the first sensing resistor and the third sensing resistor and being adapted to generate a first differential component of an upstream signal; and

a second upstream driver coupled to the second sensing resistor and the fourth sensing resistor and being adapted to generate a second differential component of the upstream signal.

43. A passive echo cancellation circuit for reducing echoes on a subscriber line, comprising:

an output driver adapted to drive a downstream signal on the subscriber line;

a first sensing circuitry coupled to the output driver and being adapted to sense a current on the subscriber line to generate a first voltage, wherein the first sensing circuitry comprises a first sensing resistor coupled between the output driver and the subscriber line, an output terminal of the resistor is coupled to the upstream driver to provide the first voltage;

a balancing network adapted to receive at least a portion of the downstream signal;

a second sensing circuitry adapted to sense a current in the portion of the downstream signal passing through the balancing network to generate a second voltage, second sensing circuitry comprises a second sensing resistor coupled between the output driver and the balancing network, and an output terminal of the second sensing resistor is coupled to the upstream driver to provide the second voltage; and

an upstream driver adapted to subtract the second voltage from the first voltage to generate an upstream signal.

44. The circuit of claim 43 , wherein the balancing network comprises a balancing load corresponding to an expected load on the subscriber line.

45. The circuit of claim 44 , wherein the balancing network further comprises a protection resistor.

46. The circuit of claim 43 , wherein the second sensing circuitry comprises a sensing resistor coupled between the output driver and the balancing network.