IP Library Granted Patent US 6,999,132
Granted Patent B1
US 6,999,132 · App. 10/079,026 · Granted Feb 14, 2006

RF/IF digital demodulation of video and audio

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Quick Facts
Patent No.
US 6,999,132
App. No.
10/079,026
Granted
Feb 14, 2006
Kind
B1
Abstract

An apparatus generally comprising a tuner circuit, an analog-to-digital circuit and a converter circuit. The tuner circuit may be configured to generate an intermediate frequency signal having a carrier signal at a first intermediate frequency in response to a first frequency conversion applied to a radio-frequency signal modulated by an analog television signal. The analog-to-digital circuit may be configured to generate a digital intermediate signal having the carrier signal at a second intermediate frequency in response to a digitization of the intermediate frequency signal. The converter circuit may be configured to generate a digital television signal representative of the analog television signal at a baseband frequency in response to a demodulation of the digital intermediate signal.

Claims (62)

1. An apparatus comprising:

a tuner circuit configured to generate an intermediate frequency signal having a carrier signal at a first intermediate frequency in response to a first frequency conversion applied to a radio-frequency signal modulated by an analog television signal;

an analog-to-digital circuit configured to generate a digital intermediate signal having said carrier signal at a second intermediate frequency in response to a digitization of said intermediate frequency signal, wherein said second intermediate frequency is above a baseband frequency;

a converter circuit configured to generate a digital television signal representative of said analog television signal at said baseband frequency in response to a demodulation of said digital intermediate signal;

a detector circuit configured to generate a level signal in response to an average level of a horizontal synchronization pulse within said digital intermediate signal.

2. The apparatus according to claim 1 , wherein said converter circuit further comprises:

a translation circuit configured to generate a digital baseband signal in response to a multiplication of said digital intermediate signal by a single sinusoid signal; and

a decimation circuit configured to generate said digital television signal in response to a decimation of said digital baseband signal.

3. The apparatus according to claim 2 , wherein said decimation circuit comprises a decimation filter configured to decimation filter said digital baseband signal.

4. The apparatus according to claim 1 , wherein said converter circuit comprises:

a first decimation filter configured to generate a first signal in response to said digital intermediate signal;

a circuit configured to generate a second signal in response to an image scaling of said first signal by a predetermined ratio; and

a second decimation filter configured to generate said digital television signal in response to said second signal.

5. The apparatus according to claim 1 , further comprising:

a decimation circuit configured to generate a second level signal in response to a second average level of a second horizontal synchronization pulse within said digital television signal; and

a control circuit configured to generate a feedback signal in response to said signal level said second level signal.

6. The apparatus according to claim 1 , wherein said analog-to-digital circuit is further configure to generate a saturation signal in response to a digital conversion saturation while generating said digital intermediate signal, said apparatus further comprising a control circuit configured to adjust a feedback signal in response to said saturation signal.

7. The apparatus according to claim 1 , wherein said converter circuit comprises:

a phase detector circuit configured to generate an error signal in response to a detection of both a phase error and a frequency error of said digital intermediate signal relative to a sinusoid signal;

a filter circuit configured to generate a feedback signal in response to said error signal;

an oscillator circuit configured to generate a sawtooth signal in response to said feedback signal; and

a lookup table circuit configured to generate a single sinusoid signal in response to a table look-up conversion of said sawtooth signal.

8. The apparatus according to claim 1 , further comprising a tracking detector circuit configured to generate an enable signal in response to a tracking of a horizontal synchronization signal within said digital intermediate signal, wherein said converter circuit includes a filter circuit configured to generate a feedback signal in response to said enable signal.

9. A method of demodulating a radio-frequency signal modulated by an analog television signal, the method comprising the steps of:

(A) generating an intermediate frequency signal having a carrier signal at a first intermediate frequency in response to a first frequency conversion applied to said radio-frequency signal;

(B) generating a digital intermediate signal having said carrier signal at a second intermediate frequency in response to a digitization of said intermediate frequency signal, wherein said second intermediate frequency is above a baseband frequency; and

(C) generating a digital television signal representative of said analog television signal at said baseband frequency in response to demodulating said digital intermediate signal;

(D) generating a level signal in response to an average level of a horizontal synchronization pulse within said digital intermediate signal.

10. The method according to claim 9 , wherein step (C) comprises the sub-steps of:

generating a digital baseband signal in response to a multiplication of said digital intermediate signal by a single sinusoid signal; and

generating said digital television signal in response to a decimation of said digital baseband signal.

11. The method according to claim 10 , wherein generating said digital television signal comprises the sub-step of decimation filtering said digital baseband signal.

12. The method according to claim 10 , wherein generating said digital television signal comprises the sub-step of:

generating a first signal in response to a first decimation filtering applied to said digital baseband signal.

13. The method according to claim 9 , further comprising the steps of:

generating a second level signal in response to a second average level of a second horizontal synchronization pulse within said digital television signal;

generating a feedback signal in response to said second level signal; and

adjusting an amplitude of said intermediate signal in response to said feedback signal to maintain said second average level proximate a predetermined threshold.

14. The method according to claim 9 , further comprising the steps of:

generating a saturation signal in response to a digital conversion saturation while generating said digital intermediate signal; and

adjusting a feedback signal in response to said saturation signal.

15. The method according to claim 9 , further comprising the steps of:

generating an error signal in response to a detection of both a phase error and a frequency error of said digital intermediate signal relative to a sinusoid signal;

generating a feedback signal in response to said error signal;

generating a sawtooth signal in response to said feedback signal; and

generating a single sinusoid signal in response to a table look-up conversion of said sawtooth signal.

16. The method according to claim 9 , further comprising the steps of:

generating an enable signal in response to a tracking of a horizontal synchronization signal within said digital intermediate signal; and

generating a feedback signal in response to said enable signal.

17. An apparatus comprising:

means for generating an intermediate frequency signal having a carrier signal at a first intermediate frequency in response to a first frequency conversion applied to a radio-frequency signal modulated by an analog television signal;

means for generating a digital intermediate signal having said carrier signal at a second intermediate frequency in response to a digitization of said intermediate frequency signal, wherein said second intermediate frequency is above a baseband frequency;

means for generating a digital television signal representative of said analog television signal at said baseband frequency in response to demodulating said digital intermediate signal;

means for generating a level signal in response to an average level of a horizontal synchronization pulse within said digital intermediate signal.

18. The method according to claim 12 , wherein generating said digital television signal further comprises the sub-step of:

generating a second signal in response to an image scaling of said first signal by a predetermined ratio.

19. The method according to claim 18 , wherein generating said digital television signal further comprises the sub-step of:

generating said digital television signal in response to a second decimation filtering applied to said second signal.

20. The method according to claim 9 , further comprising the step of:

generating a feedback signal in response to said level signal.

21. The method according to claim 20 , further comprising the step of:

adjusting an amplitude of said intermediate signal in response to said feedback signal to maintain said average level proximate a predetermined threshold.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →