Granted Patent B2

US 7,015,134 · App. 10/079,775 · Granted Mar 21, 2006

Abstract

Claims (60)

1. A method of providing a semiconductor device, the semiconductor device including a first layer desired to be etched, the method comprising the steps of:

(a) providing an anti-reflective coating layer having antireflective properties, wherein the anti-reflective coating layer comprises a layer of SiON having a thickness of less than about 500 Angstroms (Å) deposited on the first layer;

(b) patterning a resist layer, the resist layer including a pattern having a plurality of apertures therein for etching a first portion of the first layer, wherein the first portion corresponds to a memory region of the semiconductor device;

(c) etching the first portion of the first layer;

(d) removing the resist layer utilizing a plasma etch, the anti-reflective coating layer being resistant to the plasma etch;

(e) patterning a second resist layer, the second resist layer including a pattern having a plurality of apertures therein for etching a second portion of the first layer, wherein the second portion corresponds to a logic region of the semiconductor device; and

(f) etching the second portion of the first layer.

2. The method of claim 1 wherein the anti-reflective coating layer providing step (a) further includes the steps of:

(a1) depositing the anti-reflective coating layer.

3. The method of claim 1 wherein the resist layer removing step (d) further includes the step of:

(d1) performing the plasma etch using a plasma including a forming gas, the anti-reflective coating layer being resistant to the plasma etch using the plasma including the forming gas.

4. A method of providing a semiconductor device, the semiconductor device including a first layer desired to be etched, the method comprising the steps of:

(a) providing an anti-reflective coating layer having antireflective properties, wherein the anti-reflective coating layer comprises a layer of SiON having a thickness of less than about 500 Angstroms (Å) deposited on the first layer;

(b) patterning a resist layer, the resist layer including a pattern having a plurality of apertures therein for etching a first portion of the first layer;

(c) etching the first portion of the first layer;

(d) removing the resist layer utilizing a plasma etch, the anti-reflective coating layer being resistant to the plasma etch;

(e) patterning a second resist layer, the second resist layer including a pattern having a plurality of apertures therein for etching a second portion of the first layer; and

(f) etching the second portion of the first layer; wherein the resist layer removing step (d) further includes the step of:

(d1) performing the plasma etch using a plasma including a forming gas, the anti-reflective coating layer being resistant to the plasma etch using the plasma including the forming gas;

wherein the plasma further includes four percent of the forming gas.

5. A method of providing a semiconductor device, the semiconductor device including a first layer desired to be etched, the method comprising the steps of:

(a) providing an anti-reflective coating layer having antireflective properties, wherein the anti-reflective coating layer comprises a layer of SiON having a thickness of less than about 500 Angstroms (Å) deposited on the first layer;

(b) patterning a resist layer, the resist layer including a pattern having a plurality of apertures therein for etching a first portion of the first layer;

etching the first portion of the first layer;

(d) removing the resist layer utilizing a plasma etch, the anti-reflective coating layer being resistant to the plasma etch;

(e) patterning a second resist layer, the second resist layer including a pattern having a plurality of apertures therein for etching a second portion of the first layer; and

(f) etching the second portion of the first layer; wherein the resist layer removing step (d) further includes the step of:

(d1) performing the plasma etch using a plasma including a forming gas, the anti-reflective coating layer being resistant to the plasma etch using the plasma including the forming gas; and

(d2) providing a wet preclean after the plasma etching step (d1).

6. A method of providing a semiconductor device, the semiconductor device including a first layer desired to be etched, the method comprising the steps of:

(a) providing an anti-reflective coating layer having antireflective properties, wherein the anti-reflective coating layer comprises a layer of SiON having a thickness of less than about 500 Angstroms (Å) deposited on the first layer;

(b) patterning a resist layer, the resist layer including a pattern having a plurality of apertures therein for etching a first portion of the first layer;

(c) etching the first portion of the first layer;

(d) removing the resist layer utilizing a plasma etch, the anti-reflective coating layer being resistant to the plasma etch;

(e) patterning a second resist layer, the second resist layer including a pattern having a plurality of apertures therein for etching a second portion of the first layer; and

(f) etching the second portion of the first layer;

wherein a thickness of the SiON anti-reflective coating layer is three hundred Angstroms plus or minus no more than approximately ten percent.

7. A method of providing a semiconductor device including first and second regions having, respectively, first and second types of circuit structures, the method comprising:

depositing a first layer on a substrate;

depositing a layer of SiON on the first layer;

depositing a first resist layer on the SiON layer;

patterning the first resist layer for etching the first layer in the first region of the semiconductor device;

etching the first layer in the first region of the semiconductor device;

removing the first resist layer utilizing a plasma etch;

depositing a second resist layer on the SiON layer;

patterning the second resist layer for etching the first layer in the second region of the semiconductor device;

etching the first layer in the second region of the semiconductor device;

removing the second resist layer; and

removing the SiON layer.

8. The method of claim 7 wherein the SiON layer has a thickness of less than about 500 Angstroms.

9. The method of claim 7 wherein the SiON layer has a thickness of about 300 Angstroms.

10. The method of claim 9 wherein the SiON layer has a thickness of between about 270 and about 300 Angstroms.

11. The method of claim 7 wherein the first type of circuit structure comprises structures for forming memory cells and the second type of circuit structure comprises structures for forming logic circuits.

12. A method for reducing anti-reflective coating layer removal comprising the steps of:

depositing an anti-reflective coating layer on a first layer, wherein said anti-reflective coating layer comprises a layer of SiON having a thickness of less than 500 Angstroms (Å);

patterning a first resist layer on said anti-reflective coating layer, wherein said first resist layer comprises a pattern having a plurality of apertures therein for etching a first portion of said first layer;

etching said first portion of said first layer;

removing said first resist layer utilizing a plasma etch after said first portion of said first layer is etched, wherein said anti-reflective coating layer is resistant to said plasma etch;

patterning a second resist layer, wherein said second resist layer comprises a pattern having a plurality of apertures therein for etching a second portion of said first layer; and

etching said second portion of said first layer.

Assignments (6)