Patent Assignment
Reel/Frame 036038/0001
Assignment of Assignor's Interest
Recorded: 2015-06-30
Pages: 153
Assignor
SPANSION, LLC
Executed: 2015-06-01
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CALIFORNIA, 95134
Covered Properties
(50)
Dual Spacer Process for Non-Volatile Memory Devices
Patent:
7,012,008 →
Application:
09/728,554 →
Switched-Capacitor Controller to Control the Rise Times of on-Chip Generated High Voltages
Patent:
7,002,381 →
Application:
10/015,033 →
Method for Reducing Anti-Reflective Coating Layer Removal During Removal of Photoresist
Method for Semiconductor Wafer Planarization by Isolation Material Growth
Patent:
7,052,969 →
Application:
10/190,002 →
Address Sequencer Within Bist (Built-in-Self-Test) System
Patent:
7,010,736 →
Application:
10/200,518 →
Diagnostic Mode for Testing Functionality of Bist (Built-in-Self-Test) Back-End State Machine
Patent:
7,028,240 →
Application:
10/200,526 →
Non-Volatile Memory Device
Patent:
7,012,298 →
Application:
10/211,317 →
Lateral Doped Channel
Method and System for Reducing Contact Defects Using Non Conventional Contact Formation Method for Semiconductor Cells
Differentially Mis-Aligned Contacts in Flash Arrays to Calibrate Failure Modes
Patent:
7,032,193 →
Application:
10/320,910 →
Microcomputer, Method of Controlling Cache Memory, and Method of Controlling Clock
Ono Fabrication Process for Increasing Oxygen Content at Bottom Oxide-Substrate Interface in Flash Memory Devices
Patent:
7,033,957 →
Application:
10/358,586 →
Internal Bus Testing Device and Method
Non-Volatile Semiconductor Memory and Method of Manufacturing the Same
Laser Thermal Annealing Methods for Flash Memory Devices
Patent:
7,001,814 →
Application:
10/438,942 →
Undoped Oxide Liner/Bpsg for Improved Data Retention
Nonvolatile Semiconductor Memory Device Supplying Proper Program Potential
Method for Fabricating a Memory Device
Patent:
7,026,230 →
Application:
10/662,011 →
Portable Device Having a Charging Circuit and Semiconductor Device for Use in the Charging Circuit of the Same
Sidewall Formation for High Density Polymer Memory Element Array
Dielectric Pattern Formation for Organic Electronic Devices
Patent:
7,012,013 →
Application:
10/726,868 →
Substrate Bias for Programming Non-Volatile Memory
Patent:
7,023,740 →
Application:
10/755,979 →
High Voltage Transistor Scaling Tilt Ion Implant Method
Patent:
7,011,998 →
Application:
10/756,573 →
Electrostatic Discharge Performance of a Silicon Structure and Efficient Use of Area with Electrostatic Discharge Protective Device Under the Pad Approach and Adjustment of via Configuration Thereto to Control Drain Junction Resistance
Patent:
7,019,366 →
Application:
10/758,173 →
Flexible Cascode Amplifier Circuit with High Gain for Flash Memory Cells
Patent:
7,026,843 →
Application:
10/759,855 →
Disposable Hard Mask for Memory Bitline Scaling
Patent:
7,018,868 →
Application:
10/770,245 →
Memory Device
Semiconductor Component and Method of Manufacture
Patent:
7,026,211 →
Application:
10/795,890 →
Semiconductor Component and Method of Manufacture
Patent:
6,998,677 →
Application:
10/795,924 →
Clock Shift Circuit for Gradual Frequency Change
Dc/Dc Converter
Semiconductor Integrated Circuit Using Band-Gap Reference Circuit
Uv-Blocking Layer for Reducing Uv-Induced Charging of Sonos Dual-Bit Flash Memory Devices in Beol Processing
Memory Device with an Alternating Vss Interconnection
Patent:
7,009,271 →
Application:
10/823,972 →
Method and Apparatus for Eliminating Word Line Bending by Source Side Implantation
Patent:
7,029,975 →
Application:
10/839,561 →
Method of Determining Voltage Compensation for Flash Memory Devices
Patent:
7,009,887 →
Application:
10/860,450 →
Memory Wordline Spacer
Patent:
7,053,446 →
Application:
10/864,142 →
Semiconductor Device with Core and Periphery Regions
Patent:
6,995,437 →
Application:
10/869,774 →
Method of Reference Cell Design for Optimized Memory Circuit Yield
Patent:
7,020,022 →
Application:
10/887,782 →
Flash Memory Unit and Method of Programming a Flash Memory Device
Switching Regulator Control Circuit, Switching Regulator and Switching Regulator Control Method
Patterning for Elongated Vss Contact Flash Memory
Patent:
7,018,922 →
Application:
10/968,713 →
Ramped Soft Programming for Control of Erase Voltage Distributions in Flash Memory Devices
Patent:
7,020,021 →
Application:
10/981,833 →
Multi Bit Program Algorithm
Patent:
7,038,950 →
Application:
10/982,296 →
Diode Array Architecture for Addressing Nanoscale Resistive Memory Arrays
Fully Isolated Dielectric Memory Cell Structure for a Dual Bit Nitride Storage Device and Process for Making Same
Patent:
7,001,807 →
Application:
10/997,345 →
Current-Voltage Converter Circuit and Its Control Method
Pulse Width Measuring Device with Automatic Range Setting Function
Crystal Oscillation Circuit
Memory Device with Barrier Layer
Patent:
7,053,445 →
Application:
11/194,471 →
Related Assignments
(16)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Agreement
Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
Assignment of Assignor's Interest
Jul 6, 2012
From: PLAT, MARINA V.; HUI, ANGELA T.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 028499/0428 →
Assignment of Assignor's Interest
Oct 11, 2012
From: SPANSION INC.
To: SPANSION LLC
Reel/Frame 029112/0198 →
Assignment of Assignor's Interest
Sep 11, 2013
From: FUJITSU SEMICONDUCTOR LIMITED
To: SPANSION LLC
Reel/Frame 031205/0461 →
Release of Security Interest
Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
Security Interest
Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
Partial Release of Security Interest in Patents
Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
Assignment of Assignor's Interest
Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
Assignment of Assignor's Interest
Mar 29, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 042108/0880 →
Release of Security Interest
Jun 12, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 042769/0227 →
Assignment of Assignor's Interest
May 4, 2019
From: CYPRESS SEMICONDUCTOR CORPORATION
To: LONGITUDE FLASH MEMORY SOLUTIONS LTD.
Reel/Frame 049086/0803 →
Release of Security Interest
May 7, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 049109/0573 →
Assignment and Assumption of Security Interest in Intellectual Property
Oct 28, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: MUFG UNION BANK, N.A.
Reel/Frame 050896/0366 →
Corrective Assignment to Correct the 8647899 Previously Recorded on Reel 035240 Frame 0429. Assignor(S) Hereby Confirms the Security Interst.
Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
Release of Security Interest
Mar 16, 2022
From: MUFG UNION BANK, N.A.
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 059410/0438 →
Assignment of Assignor's Interest
Apr 15, 2022
From: CYPRESS SEMICONDUCTOR CORPORATION
To: INFINEON TECHNOLOGIES LLC
Reel/Frame 059721/0467 →