IP Library › Assignment 042769/0227
Patent Assignment
Reel/Frame 042769/0227

Release of Security Interest

Recorded: 2017-06-12 Received: 2017-06-12 Pages: 12
Assignor
Assignee
CYPRESS SEMICONDUCTOR CORPORATION
198 CHAMPION COURT, SAN JOSE, CA, 95134-1709, UNITED STATES
Covered Properties (91)
Rapid Memory Buffer Write Storage System and Method
Application: 15/098,156 →
Simultaneous Formation of a Top Oxide Layer in a Silicon-Oxide-Nitride-Oxide-Silicon (Sonos) Transistor and a Gate Oxide in a Metal Oxide Semiconductor (Mos)
Application: 14/599,157 →
Rapid Memory Buffer Write Storage System and Method
Application: 13/764,602 →
Simultaneous Formation of a Top Oxide Layer in a Silicon-Oxide-Nitride-Oxide-Silicon (Sonos) Transistor and a Gate Oxide in a Metal Oxide Semiconductor (Mos)
Application: 13/551,407 →
Simultaneous Formation of a Top Oxide Layer in a Silicon-Oxide-Nitride-Oxide-Silicon (Sonos) Transistor and a Gate Oxide in a Metal Oxide Semiconductor (Mos)
Application: 12/782,699 →
Digital Feedback Technique for Regulators
Application: 12/621,311 →
Rapid Memory Buffer Write Storage System and Method
Application: 12/337,963 →
Spi Addressing Beyond 24-Bits
Application: 12/277,911 →
Digital Feedback Technique for Regulators
Application: 61/115,540 →
Replica Transistor Voltage Regulator
Application: 12/154,169 →
Programmable Floating Gate Reference
Application: 12/104,678 →
Charge Pump to Supply Voltage Bands
Application: 12/012,389 →
Operational Amplifier, Line Driver, and Liquid Crystal Display Device
Application: 12/000,995 →
Voltage Regulator and Method Having Reduced Wakeup-Time and Increased Power Efficiency
Application: 11/999,676 →
Shorted Input Detection for Amplifier Circuits
Application: 11/818,172 →
Replica transistor voltage regulator architecture
Application: 60/931,216 →
Method of Fabricating Semiconductor Memory Device and Semiconductor Memory Device Driver
Application: 11/783,468 →
Voltage Stress Testing of Core Blocks and Regulator Transistors
Application: 11/705,986 →
Pull-Up Circuit for an Input Buffer
Application: 11/654,445 →
Method for on Chip Sensing of Sonos Vt Window in Non-Volatile Static Random Access Memory
Application: 11/647,017 →
Simultaneous Formation of a Top Oxide Layer in a Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) Transistor and a Gate Oxide in a Metal Oxide Semiconductor (MOS)
Application: 11/615,683 →
Combination Sram and Nvsram Semiconductor Memory Array
Application: 11/644,789 →
Voltage regulator and method having improved wakeup-time and power efficiency
Application: 60/873,803 →
Offset Voltage Correction for High Gain Amplifier
Application: 11/636,347 →
Shorted input detection for a transimpedance amplifier
Application: 60/840,272 →
Programmable Electrostatic Discharge (Esd) Protection Device
Application: 11/422,926 →
Operational Amplifier, Line Driver, and Liquid Crystal Display Device
Application: 11/448,669 →
Dc Linear Regulator Single Controller with Plural Loads
Application: 11/447,009 →
Amplifier Circuit with Bias Stage for Controlling a Common Mode Output Voltage of the Gain Stage During Device Power-Up
Application: 11/420,948 →
High voltage tolerant pull up on input buffer
Application: 60/781,918 →
Control Circuit and Control Method for Dc-Dc Converter
Application: 11/369,003 →
Method of voltage stress testing of core blocks and regulator fets
Application: 60/773,001 →
Method of controlling a high voltage switch with low voltage control signals
Application: 60/773,000 →
Dc-Dc Converter and Its Control Method, and Switching Regulator and Its Control Method
Application: 11/350,720 →
Stress Liner for Integrated Circuits
Application: 11/350,160 →
Semiconductor Device and Method for Controlling Operation Thereof
Application: 11/316,800 →
Replica Regulator with Continuous Output Correction
Application: 11/313,342 →
Nonvolatile Memory Device, and Its Manufacturing Method
Application: 11/291,048 →
Amplifier circuit with bias stage for controlling a common mode output voltage of the gain stage during device power-up
Application: 60/688,289 →
Operational Amplifier
Application: 11/108,815 →
Shunt Type Voltage Regulator
Application: 11/095,909 →
Voltage Regulator Circuit
Application: 11/068,419 →
Replica regulator with continuous output correction
Application: 60/639,009 →
Replica Bias Regulator with Sense-Switched Load Regulation Control
Application: 11/004,564 →
Semiconductor Device and Method of Manufacturing the Same
Application: 10/986,652 →
Replica Biased Voltage Regulator
Application: 10/965,445 →
Switching Regulator Control Circuit, Switching Regulator and Switching Regulator Control Method
Application: 10/948,644 →
Method of fabricating semiconductor memory device and semiconductor memory device driver
Application: 10/916,410 →
Method for Pulse Erase in Dual Bit Memory Devices
Application: 10/899,684 →
Ramp Source Hot-Hole Programming for Trap Based Non-Volatile Memory Devices
Application: 10/863,933 →
Operational Amplifier, Line Driver, and Liquid Crystal Display Device
Application: 10/811,431 →
Signal Transmission Amplifier Circuit
Application: 10/797,147 →
Voltage regulator architecture and method of operating the same
Application: 60/549,698 →
Replica biased voltage regulator
Application: 60/531,911 →
Process for Fabrication of Spacer Layer with Reduced Hydrogen Content in Semiconductor Device
Application: 10/731,494 →
Replica bias regulator with sense-switched load regulation control
Application: 60/527,150 →
Circuit and Technique for Accurately Sensing Low Voltage Flash Memory Devices
Application: 10/679,179 →
Portable Device Having a Charging Circuit and Semiconductor Device for Use in the Charging Circuit of the Same
Application: 10/665,406 →
A Flash Memory Cell with Drain and Source Formed by Diffusion of a Dopant from a Silicide
Application: 10/661,720 →
Cam (Content Addressable Memory) Cells as Part of Core Array in Flash Memory Device
Application: 10/650,049 →
Programming of a Flash Memory Cell
Application: 10/617,971 →
Method for Predicting Remaining Charge of Portable Electronics Battery
Application: 10/412,427 →
Single ended self-referencing amplifier for fast signal transfer
Application: 60/457,751 →
Dual Tristate Path Output Buffer Control
Application: 10/353,375 →
Memory Circuit Arrangement for Programming a Memory Cell
Application: 10/348,732 →
Method for Producing a Low Defect Homogeneous Oxynitride
Application: 10/306,382 →
Method of Programming in-Series Memory Cells
Application: 10/282,847 →
Method of Fabricating Semiconductor Memory Device and Semiconductor Memory Device Driver
Application: 10/279,981 →
A Multi-Bit Silicon Nitride Charge-Trapping Non-Volatile Memory Cell
Application: 10/247,641 →
Virtual Ground Silicide Bit Line Process for Floating Gate Flash Memory
Application: 10/238,412 →
Method for Repairing Over-Erasure of Fast Bits in Floating Gate Memory Devices
Application: 10/215,140 →
2BIT/Cell Architecture for Floating Gate Flash Memory Product and Associated Method
Application: 10/180,673 →
Replacing Layers of an Intergate Dielectric Layer with High-K Material for Improved Scalability
Application: 10/145,952 →
Operational Amplifier
Application: 10/108,341 →
Regulator Circuit and Control Method Thereof
Application: 10/101,976 →
Flash Memory Array Architecture Having Staggered Metal Lines
Application: 10/096,313 →
Method and Apparatus for Pre-Charging Negative Pump Mos Regulation Capacitors
Application: 10/050,342 →
Nonvolatile Semiconductor Memory
Application: 10/043,114 →
Dual Tristate Path Output Buffer Control
Application: 09/997,130 →
Method of Fabricating Double Densed Core Gates in Sonos Flash Memory
Application: 09/971,483 →
Flash Memory Device with Increase of Efficiency During an Apde (Automatic Program Disturb After Erase) Process
Application: 09/969,572 →
Non-Volatile Semiconductor Memory Device and Fabrication Process Thereof
Application: 09/963,632 →
Semiconductor device and method of manufacturing the same
Application: 09/922,786 →
Method of Programming a Non-Volatile Memory Cell Using a Vertical Electric Field
Application: 09/899,721 →
Low Column Leakage nor Flash Array-Double Cell Implementation
Application: 09/884,565 →
Flash memory device with increase of efficiency during an APDE (authomatic program disturb after erase) process
Application: 60/291,861 →
Method of Channel Hot Electron Programming for Short Channel nor Flash Arrays
Application: 09/861,031 →
Semiconductor Memory Device Having Source Areas of Memory Cells Supplied with a Common Voltage
Application: 09/818,652 →
Charge Circuit That Performs Charge Control by Comparing a Plurality of Battery Voltages
Application: 09/815,049 →
Process for Making a Dual Bit Memory Device with Isolated Polysilicon Floating Gates
Application: 09/810,155 →
DC-DC converter and semiconductor integrated circuit device for DC-DC converter
Application: 09/769,240 →