Simultaneous formation of a top oxide layer in a silicon-oxide-nitride-oxide-silicon (SONOS) transistor and a gate oxide in a metal oxide semiconductor (MOS)

1. A method for semiconductor fabrication, comprising:

forming a tunnel oxide layer over a silicon substrate by applying a thermal oxidation technique at a first temperature;

forming a nitride layer over said tunnel oxide layer;

etching said nitride layer and said tunnel oxide layer except where at least one silicon oxide nitride oxide silicon (SONOS) transistor is formed;

simultaneously forming a top oxide layer by applying a plasma oxidation technique at a second temperature lower than the first temperature to said nitride layer where said at least one SONOS transistor is formed and a gate oxide layer over said silicon substrate that is exposed corresponding to where at least one metal oxide semiconductor (MOS) transistor is formed.

2. The method of claim 1 , wherein said simultaneously forming the top oxide layer oxide layer further comprises:

forming the top oxide layer without performing densification of said top oxide layer.

3. The method of claim 1 , wherein said etching said nitride layer comprises:

forming a masking layer over an area where said at least one SONOS transistor is formed.

4. The method of claim 3 , wherein said simultaneously forming the top and gate oxide layers comprises:

removing said masking layer.

5. The method of claim 1 , wherein said nitride layer comprises an oxynitride.

6. The method of claim 1 , wherein said simultaneously forming the top oxide layer comprises:

controlling a thickness of said top oxide layer.

7. The method of claim 1 , wherein said SONOS transistor comprises a nonvolatile memory in a memory array; and

said at least one MOS transistor is located peripherally from said memory array.

8. The method of claim 1 , wherein said SONOS transistor comprises a nonvolatile memory in a memory array; and

said at least one MOS transistor is located within said memory array.