IP Library Granted Patent US 8,080,984
Granted Patent B1
US 8,080,984 · App. 12/154,169 · Granted Dec 20, 2011

Replica transistor voltage regulator

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Quick Facts
Patent No.
US 8,080,984
App. No.
12/154,169
Granted
Dec 20, 2011
Kind
B1
Abstract

A voltage regulator is provided having high accuracy, low PSRR, and no headroom limitation. Generally, the regulator includes: an operational amplifier (OPAMP) having a non-inverting input coupled to a reference voltage; an output source follower coupled to and controlled by an output of the OPAMP, the output source follower including a drain coupled to a voltage source and a source coupled to an output-node of the regulator; a replica source follower coupled to and controlled by the OPAMP, the replica source follower including a drain coupled to the voltage source and a source coupled to circuit ground through a resistor network; and a feedback circuit extending from the output-node through a feedback resistor to the source of the replica source follower and through at least a first resistor of the resistor network to an inverting input of the OPAMP to couple a feedback voltage thereto. Other embodiments are also provided.

Claims (35)

1. A voltage regulator comprising:

an operational amplifier (OPAMP) having a non-inverting input coupled to a reference voltage (Vref);

an output source follower coupled to and controlled by an output of the OPAMP, the output source follower including a drain coupled to a voltage source and a source coupled to an output-node of the voltage regulator;

a replica source follower coupled to and controlled by the output of the OPAMP in parallel with the output source follower, the replica source follower including a drain coupled to the voltage source and a source coupled to a circuit ground through a resistor network; and

a feedback circuit extending from the output-node through a feedback resistor to the source of the replica source follower and through at least a first resistor of the resistor network to an inverting input of the OPAMP to couple a feedback voltage (Vfbk) thereto to regulate a voltage (Vout) at the output-node in response to a comparison between Vfbk and Vref.

2. A voltage regulator according to claim 1 , wherein the feedback resistor comprises a resistance equal to or less than about 100 Ohms.

3. A voltage regulator according to claim 1 , wherein the voltage regulator is a replica transistor voltage regulator comprising a replica leg including the replica source follower and the resistor network, and an output leg comprising the output source follower and further comprising a leaker transistor coupled between the source of the output source follower and circuit ground.

4. A voltage regulator according to claim 3 , wherein the leaker transistor comprises a drain coupled to the source of the output source follower and a source coupled to circuit ground, and wherein the leaker transistor is controlled by a bias voltage to leak current from the output-node to provide at least a constant minimum current flow in the output source follower.

5. A voltage regulator according to claim 1 , wherein the voltage regulator has a Vout that varies by 4.5% or less from a predetermined Vout.

6. A voltage regulator according to claim 1 , wherein the voltage regulator has a power supply rejection ratio (PSRR) equal to or less than about −20 decibels (dB).

7. A voltage regulator according to claim 1 , wherein the voltage regulator has maximum headroom of at least 280 millivolts (mV).

8. A voltage regulator according to claim 1 , wherein the voltage regulator utilizes a small area on a substrate on which it is implemented, having an area of less than about 100K microns (μm2).

9. A voltage regulator comprising:

an operational amplifier (OPAMP) having a non-inverting input coupled to a predetermined reference voltage (Vref);

an output source follower coupled to and controlled by an output of the OPAMP, the output source follower including a drain coupled to a voltage source and a source coupled to an output-node of the voltage regulator;

a replica source follower coupled to and controlled by the output of the OPAMP in parallel with the output source follower, the replica source follower including a drain coupled to the voltage source and a source coupled to a circuit ground through a resistor network; and

a feedback circuit extending from the output-node through a feedback transistor to the source of the replica source follower and through at least a first resistor of the resistor network to an inverting input of the OPAMP to couple a feedback voltage (Vfbk) thereto to regulate a voltage (Vout) at the output-node in response to a comparison between Vfbk and Vref.

10. A voltage regulator according to claim 9 , wherein the feedback transistor is controlled by a biasing voltage that can be varied to adjust a magnitude of Vfbk.

11. A voltage regulator according to claim 10 , wherein the feedback transistor is connected as a source follower having a source coupled to the source of the replica source follower and a drain coupled to the source of the output source follower.

12. A voltage regulator according to claim 11 , wherein the feedback transistor further comprises a bulk terminal coupled to the source thereof to improve the stability of the feedback circuit.

13. A voltage regulator according to claim 9 , wherein the voltage regulator is a replica transistor voltage regulator comprising a replica leg including the replica source follower and the resistor network, and an output leg comprising the output source follower and further comprising a leaker transistor coupled between the source of the output source follower and circuit ground to provide at least a constant minimum current flow in the output source follower.

14. A voltage regulator according to claim 9 , wherein the voltage regulator has a Vout that varies by 4.5% or less from a predetermined Vout.

15. A voltage regulator according to claim 9 , wherein the voltage regulator has a power supply rejection ratio (PSRR) equal to or less than about −20 decibels (dB).

16. A voltage regulator according to claim 9 , wherein the voltage regulator has maximum headroom of at least 280 millivolts (mV).

17. A voltage regulator according to claim 9 , wherein the voltage regulator utilizes a small area on a substrate on which it is implemented, having an area of less than about 100K microns (μm2).

18. A method for operating a voltage regulator comprising:

coupling a reference voltage (Vref) to a non-inverting input of an operational amplifier (OPAMP);

controlling with a voltage (Vgate) from an output of the OPAMP an output source follower coupled thereto, the output source follower including a drain coupled to a voltage source and a source coupled to an output-node of the voltage regulator;

controlling with Vgate a replica source follower coupled to the output of the OPAMP in parallel with the output source follower, the replica source follower including a drain coupled to the voltage source and a source coupled to a circuit ground through a resistor network; and

coupling a feedback voltage (Vfbk) from the output-node to an inverting input of the OPAMP through a feedback circuit extending through at least a first resistor of the resistor network to regulate a voltage (Vout) at the output-node in response to a comparison between Vfbk and Vref, wherein the feedback circuit comprises a feedback resistor coupled between the output-node and the source of the replica source follower.

19. A method for operating a voltage regulator comprising:

coupling a reference voltage (Vref) to a non-inverting input of an operational amplifier (OPAMP);

controlling with a voltage (Vgate) from an output of the OPAMP an output source follower coupled thereto, the output source follower including a drain coupled to a voltage source and a source coupled to an output-node of the voltage regulator;

controlling with Vgate a replica source follower coupled to the output of the OPAMP in parallel with the output source follower, the replica source follower including a drain coupled to the voltage source and a source coupled to a circuit ground through a resistor network; and

coupling a feedback voltage (Vfbk) from the output-node to an inverting input of the OPAMP through a feedback circuit extending through at least a first resistor of the resistor network to regulate a voltage (Vout) at the output-node in response to a comparison between Vfbk and Vref, wherein the feedback circuit comprises a feedback transistor coupled between the output-node and the source of the replica source follower and controlled by a biasing voltage that can be varied to adjust a magnitude of Vfbk.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2025
From: MONTEREY RESEARCH LLC
To: SOUTHFORK IP HOLDINGS LLC
Reel/Frame 071299/0161 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
RELEASE OF SECURITY INTEREST Recorded Jun 12, 2017
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 042769/0227 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2017
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 042108/0880 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 21, 2008
From: GEYNET, LIONEL
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 021153/0608 →