IP Library Granted Patent US 7,001,814
Granted Patent B1
US 7,001,814 · App. 10/438,942 · Granted Feb 21, 2006

Laser thermal annealing methods for flash memory devices

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Quick Facts
Patent No.
US 7,001,814
App. No.
10/438,942
Granted
Feb 21, 2006
Kind
B1
Abstract

A method of manufacturing an ONO (oxide-nitride-oxide) insulating layer for a flash memory device, the insulating layer including a first oxide layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer, wherein at least one of the first oxide layer, the nitride layer and the second oxide layer are conditioned using laser thermal annealing.

Claims (43)

1. A method of manufacturing a flash memory device of a semiconductor device, comprising:

growing or depositing a tunnel oxide on a substrate;

depositing a first polysilicon layer over the tunnel oxide;

forming an insulating layer over the first polysilicon layer, the insulating layer comprising a first oxide layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer, wherein at least one of the first oxide layer, the nitride layer and the second oxide layer are conditioned using laser thermal annealing;

depositing a polysilicon layer over the insulating layer;

etching at least the polysilicon layer and the insulating layer; and

forming a source region and a drain region in the substrate.

2. The method of manufacturing a flash memory device according to claim 1 , wherein the first oxide layer is conditioned using laser thermal annealing.

3. The method of manufacturing a flash memory device according to claim 1 , wherein the second oxide layer is conditioned using laser thermal annealing.

4. The method of manufacturing a flash memory device according to claim 1 , wherein the nitride layer is conditioned using laser thermal annealing.

5. The method of manufacturing a flash memory device according to claim 1 , wherein the oxide layers are conditioned using laser thermal annealing.

6. The method of manufacturing a flash memory device according to claim 1 , wherein each of the nitride layer and the oxide layers are conditioned using laser thermal annealing.

7. The method of manufacturing a flash memory device according to claim 1 , wherein the first and the second oxide layers are deposited using chemical vapor deposition.

8. The method of manufacturing a flash memory device according to claim 1 , wherein the second oxide layer is conditioned using laser thermal annealing and the laser thermal annealing includes melting the second oxide layer at a relatively low power and allowing the melted layer to cool relatively rapidly.

9. The method of manufacturing a flash memory device according to claim 1 , wherein the insulating layer is laser thermal annealed such that the layer has a substantially uniform grain size.

10. The method of manufacturing a flash memory device according to claim 1 , wherein the laser thermal annealing melts amorphitized regions of the insulating layer and does not melt recrystallized regions of the insulating layer.

11. The method of manufacturing a flash memory device according to claim 1 , wherein the insulating layer comprises a standard-K dielectric material.

12. The method of manufacturing a flash memory device according to claim 1 , wherein the insulating layer comprises a mid-K dielectric material.

13. The method of manufacturing a flash memory device according to claim 1 , wherein the insulating layer comprises a high-K dielectric material.

14. The method of manufacturing a flash memory device according to claim 1 , wherein the insulating layer comprises at least one of silicon nitride (Si 3 N 4 ), silicon oxynitrides (Si x N y O z ), aluminum oxide (Al 2 O 3 ), lanthanum oxide (La 2 O 3 ), tantalum pentoxide (Ta 2 O 5 ), hafnium oxide (HfO 2 ), yttrium oxide (Y 2 O 3 ), zirconium oxide (ZrO 2 ), strontium titanate (SrTiO 3 ) and barium strontium titanate (BaSrTiO 3 ), barium titanate (BaTiO 3 ), titanium dioxide (TiO 2 ), cerium oxide (CeO 2 ), lead titanate (PbTiO 3 ), lead zirconate (PbZrO 3 ), tungsten oxide (WO 3 ), barium strontium titanatc (BST) (Ba 1-x ,Sr x ,TiO 3 ), PMN (PbMg x Nb 1-x O 3 ), PZT(PbZr x Ti 1-x O 3 ), PZN (PbZn x Nb l-x O 3 ), and PST (PbSc x Ta l-x O 3 ), and silicates and aluminates of these oxides.

15. The method of manufacturing a flash memory device according to claim 1 , wherein the insulating layer comprises at least one of silicon dioxide, silicon nitride, silicon oxynitride and aluminum oxide.

16. The method of manufacturing a flash memory device according to claim 1 , wherein the at least one layer that is conditioned using laser thermal annealing is first deposited using chemical vapor deposition, and the deposition and the laser thermal annealing are conducted in the same process chamber.

17. The method of manufacturing a flash memory device according to claim 1 , wherein the first oxide layer a thickness from about 30 Å to about 15 Å.

18. The method of manufacturing a flash memory device according to claim 1 , wherein the second oxide layer a thickness from about 30 Å to about 150 Å.

19. The method of manufacturing a flash memory device according to claim 1 , wherein the nitride layer a thickness from about 50 Å to about 150 Å.

20. The method of manufacturing a flash memory device according to claim 1 , wherein the tunnel oxide and the first polysilicon layer are conditioned using laser thermal annealing.

21. The method of manufacturing a flash memory device according to claim 1 , further comprising forming a first-bit line oxide region over the source region of the substrate and forming a second-bit line oxide region over the drain region of the substrate.

22. The method of manufacturing a flash memory device according to claim 20 , wherein the first oxide layer a thickness from about 50 Å to about 150 Å.

23. The method of manufacturing a flash memory device according to claim 20 , wherein the second oxide layer a thickness from about 100 Å to about 200 Å.

24. The method of manufacturing a flash memory device according to claim 20 , wherein the nitride layer a thickness from about 50 Å to about 150 Å.

25. The method of manufacturing a flash memory device according to claim 1 , wherein the polysilicon layer is conditioned using laser thermal annealing.

26. A method of manufacturing a flash memory device of a semiconductor device, comprising:

forming an insulating layer over a substrate, the insulating layer comprising a first oxide layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer, wherein at least one of the first oxide layer, the nitride layer and the second oxide layer are conditioned using laser thermal annealing;

depositing a polysilicon layer over the insulating layer;

etching at least the polysilicon layer and the insulating layer;

forming a source region and a drain region in the substrate; and

wherein the insulating layer is laser thermal annealed such that the layer has a substantially uniform grain size.

27. A method of manufacturing a flash memory device of a semiconductor device, comprising:

forming an insulating layer over a substrate, the insulating layer comprising a first oxide layer, a nitride layer over the first oxide layer, and a second oxide layer over the nitride layer, wherein at least one of the first oxide layer, the nitride layer and the second oxide layer are conditioned using laser thermal annealing;

depositing a polysilicon layer over the insulating layer;

etching at least the polysilicon layer and the insulating layer;

forming a source region and a drain region in the substrate; and

wherein the at least one layer that is conditioned using laser thermal annealing is first deposited using chemical vapor deposition, and the deposition and the laser thermal annealing are conducted in the same process chamber.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036038/0001 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 27, 2007
From: SPANSION INC.
To: SPANSION LLC
Reel/Frame 019069/0330 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 22, 2007
From: ADVANCED MICRO DEVICES, INC.
To: SPANSION INC.
Reel/Frame 019047/0560 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 16, 2003
From: HALLIYAL, ARVIND; RAMSBEY, MARK T.; OGLE, ROBERT B.
To: ADVANCED MICRO DEVICES, INC.
Reel/Frame 014086/0527 →