Insulating substrate boards for semiconductor and power modules
View Patent ↗An insulating substrate board for a semiconductor of the present invention comprises a ceramic substrate board ( 2 ) and a metal alloy layer ( 3 ) consisting of aluminum formed on one surface portion of the ceramic substrate board ( 2 ), wherein the Vickers hardness of the metal alloy layer ( 3 ) is not less than 25 and not more than 40. The metal alloy layer ( 3 ) includes silicon of not less than 0.2% by weight and not more than 5% by weight. The ceramic substrate board ( 2 ) is made of a material selected from a group consisting of alumina. aluminum nitride, and silicon nitride. A power module of the present invention comprises a metal base plate ( 7 ), a ceramic substrate board ( 2 ), one surface of which is bonded to the metal base plate ( 7 ), and the other surface of which is bonded on a semiconductor tip ( 1 ), at least one surface portion of the ceramic substrate board ( 2 ) having a metal alloy layer ( 3 ) consisting of aluminum, wherein the Vickers hardness of the metal alloy layer ( 3 ) is not less than 25 and not more than 40.
1. An insulating substrate board for a semiconductor comprising:
a ceramic substrate board; and
a metal alloy layer consisting essentially of aluminum of not less than 98% by weight and of silicon of not less than 0.2% by weight and not more than 0.5% by weight,
wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board, and wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
2. The insulating substrate board according to claim 1 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board by direct bonding.
3. The insulating substrate board according to claim 1 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board through a brazing material layer.
4. An insulating substrate board for a semiconductor comprising:
a ceramic substrate board; and
a metal alloy layer consisting essentially of aluminum, silicon of about 0.6% by weight, and Mn of about 1.5% by weight.
wherein the metal alloy layer is bonded by direct bonding on at least one surface portion of the ceramic substrate board, and wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
5. An insulating substrate board for a semiconductor comprising:
a ceramic substrate board; and
a metal alloy layer consisting essentially of aluminum, silicon of not less than 0.1% by weight and not more than 0.4% by weight, and Mg of not less than 0.5% by weight and not more than 1% by weight,
wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board, and wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
6. The insulating substrate board according to claim 5 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board by direct bonding.
7. The insulating substrate board according to claim 5 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board through a brazing material layer.
8. An insulating substrate board for a semiconductor comprising:
a ceramic substrate board; and
a metal alloy layer consisting essentially of aluminum and of Cu of not less than 1.0% by weight and not more than 2.0% by weight,
wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board, and wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
9. The insulating substrate board according to claim 8 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board by direct bonding.
10. The insulating substrate board according to claim 8 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board through a brazing material layer.
11. An insulating substrate board for a semiconductor comprising:
a ceramic substrate board; and
a metal alloy layer consisting essentially of aluminum and of Zn of about 2.0% by weight,
wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board, and wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
12. The insulating substrate board according to claim 11 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board by direct bonding.
13. The insulating substrate board according to claim 11 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board through a brazing material layer.
14. An insulating substrate board for a semiconductor comprising:
a ceramic substrate board; and
metal alloy layers consisting essentially of aluminum, silicon of about 0.1% by weight, and Cu of about 1.0% by weight,
wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board, and wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
15. The insulating substrate board according to claim 14 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board by direct bonding.
16. The insulating substrate board according to claim 14 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board through a brazing material layer.
17. An insulating substrate board for a semiconductor comprising:
a ceramic substrate board; and
a metal alloy layer consisting essentially of aluminum, Si of about 0.1% by weight, Cu of about 1.0% by weight, and Mg of about 0.1% by weight.
wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board, nd wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
18. The insulating substrate board according to claim 17 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board by direct bonding.
19. The insulating substrate board according to claim 17 , wherein the metal alloy layer is bonded on at least one surface portion of the ceramic substrate board through a brazing material layer.
20. A power module comprising:
a ceramic substrate board;
metal alloy layers consisting essentially of aluminum of not less than 98% by weight and of silicon of not less than 0.2% by weight and not more than 0.5% by weight, wherein the metal alloy layers are bonded on both surfaces of the ceramic substrate board;
a metal base plate bonded to one of the metal alloy layers; and
a semiconductor tip formed on the other of the metal alloy layer,
wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
21. The power module according to claim 20 , wherein the metal alloy layers are bonded on the ceramic substrate board by direct bonding.
22. The power module according to claim 20 , wherein the metal alloy layers are bonded on the ceramic substrate board through a brazing material layer.
23. A power module comprising:
a ceramic substrate board;
metal alloy layers consisting essentially of aluminum, silicon of about 0.6% by weight, and Mn of about 1.5% by weight, wherein the metal alloy layers are bonded on both surfaces of the ceramic substrate board;
a metal base plate bonded to one of the metal alloy layers; and
a semiconductor tip formed on the other of the metal alloy layer,
wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
24. A power module comprising:
a ceramic substrate board;
metal alloy layers consisting essentially of aluminum, silicon of not less than 0.1% by weight and not more than 0.4% by weight, and Mg of not less than 0.5% by weight and not more than 1% by weight, wherein the metal alloy layers are bonded on both surfaces of the ceramic substrate board;
a metal base plate bonded to one of the metal alloy layers; and
a semiconductor tip formed on the other of the metal alloy layer,
wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
25. The power module according to claim 24 , wherein the metal alloy layers are bonded on the ceramic substrate board by direct bonding.
26. The power module according to claim 24 , wherein the metal alloy layers are bonded on the ceramic substrate board through a brazing material layer.
27. A power module comprising:
a ceramic substrate board;
metal alloy layers consisting essentially of aluminum and of Cu of not less than 1.0% by weight and not more than 2.0% by weight, wherein the metal alloy layers are bonded on both surfaces of the ceramic substrate board;
a metal base plate bonded to one of the metal alloy layers; and
a semiconductor tip formed on the other of the metal alloy layer,
wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
28. The power module according to claim 27 , wherein the metal alloy layers are bonded on the ceramic substrate board by direct bonding.
29. The power module according to claim 27 , wherein the metal alloy layers are bonded on the ceramic substrate board through a brazing material layer.
30. A power module comprising:
a ceramic substrate board;
metal alloy layers consisting essentially of aluminum and of Zn of about 2.0% by weight, wherein the metal alloy layers are bonded on both surfaces of the ceramic substrate board;
a metal base plate bonded to one of the metal alloy layers; and
a semiconductor tip formed on the other of the metal alloy layer,
wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
31. The power module according to claim 30 , wherein the metal alloy layers are bonded on the ceramic substrate board by direct bonding.
32. The power module according to claim 30 , wherein the metal alloy layers are bonded on the ceramic substrate board through a brazing material layer.
33. A power module comprising:
a ceramic substrate board;
metal alloy layers consisting essentially of aluminum, silicon of about 0.1% by weight, and Cu of about 1.0% by weight, wherein the metal alloy layers are bonded on both surfaces of the ceramic substrate board;
a metal base plate bonded to one of the metal alloy layers; and
a semiconductor tip formed on the other of the metal alloy layer,
wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
34. The power module according to claim 33 , wherein the metal alloy layers are bonded on the ceramic substrate board by direct bonding.
35. The power module according to claim 33 , wherein the metal alloy layers are bonded on the ceramic substrate board through a brazing material layer.
36. A power module comprising:
a ceramic substrate board;
metal alloy layers consisting essentially of aluminum, Si of about 0.1% by weight, Cu of about 1.0% by weight, and Mg of about 0.1% by weight, wherein the metal alloy layers are bonded on both surfaces of the ceramic substrate board;
a metal base plate bonded to one of the metal alloy layers; and
a semiconductor tip formed on the other of the metal alloy layer,
wherein a Vickers hardness of the metal alloy layer is not less than 25 and not more than 35.
37. The power module according to claim 36 , wherein the metal alloy layers are bonded on the ceramic substrate board by direct bonding.
38. The power module according to claim 37 , wherein the metal alloy layers are bonded on the ceramic substrate board through a brazing material layer.