Imaging device with suppressed inter-column variations
View Patent ↗An imaging device reads an output level of a pixel circuit constituting a pixel array by supplying current to the pixel circuit. It reads a signal level and reset level from the pixel circuit by supplying it with the current from a current source circuit, and stores them into a line memory. A pixel level of the pixel circuit is obtained by a differential amplifier that outputs the difference between the signal level and reset level of the same pixel circuit. The gate potential of a current copier transistor that supplies the read current is set at a value that enables the read current to take a constant value from column to column of the pixel array. The image device can suppress variations in the current copier circuit provided for each array column of the pixel circuits, thereby reducing string-like noise in the image picked up.
1. An imaging device for reading a pixel level by supplying a read current to a pixel circuit constituting an array column of a pixel array, said imaging device comprising:
a read current source unit having for each array column a current copier circuit for supplying the read current to the array column;
a memory for storing the pixel level read from said pixel circuit;
a calculating circuit for obtaining a pixel output of said pixel circuit using the pixel level supplied from said memory; and
a scanner for causing said read current source unit to supply the read current to the array column including the pixel circuit from which the pixel output is to be read, for causing said memory to store the pixel level of said pixel circuit, and for causing said calculating circuit to obtain the pixel output by reading the output level from said memory, wherein
said current copier circuit has a current copier transistor and a capacitor that stores a gate potential of said current copier transistor.
2. The imaging device according to claim 1 , wherein said current copier circuit provided for each array column includes a current copier transistor, and said read current source unit supplies a gate of said current copier transistor with a setting potential that causes said current copier transistor to output the constant read current.
3. The imaging device according to claim 2 , wherein said read current source unit comprises a dummy circuit for holding the setting potential of the read current, which is applied to the gate of said current copier transistor, when outputs of all current copier circuits are interrupted.
4. The imaging device according to claim 2 , wherein said read current source unit comprises a switching transistor for turning on and off the setting potential of the read current applied to the gate of said current copier transistor, and a feedthrough compensation transistor for eliminating feedthrough effect said switching transistor has.
5. The imaging device according to claim 1 , wherein said read current source unit supplies a predetermined potential to a current feed line that is provided for supplying the read current to the array column, when the output of the read current is interrupted.
6. The imaging device according to claim 1 , wherein said memory comprises a signal level memory for storing a signal level read from said pixel circuit as the pixel level, and a reset level memory for storing a reset level read from said pixel circuit as the pixel level, and said calculating circuit obtains the pixel output of said pixel circuit from the difference between the signal level read from said signal level memory and the reset level read from said reset level memory.
7. An imaging device for reading a pixel level by supplying a read current to a pixel circuit constituting an array column of a pixel array, said imaging device comprising:
a read current source unit having for each array column a current copier circuit for supplying the read current of a same magnitude to all pixel circuits in the array column;
a memory for storing the pixel level read from said pixel circuit;
a calculating circuit for obtaining a pixel output of said pixel circuit using the pixel level supplied from said memory; and
a scanner for causing said read current source unit to supply the read current to the array column including the pixel circuit from which the pixel output is to be read, for causing said memory to store the pixel level of said pixel circuit, and for causing said calculating circuit to obtain the pixel output by reading the output level from said memory, wherein
said current copier circuit provided for each array column includes a current copier transistor, and said read current source unit supplies a gate of said current copier transistor with a setting potential that causes said current copier transistor to output a constant read current, wherein
said read current source unit comprises a dummy circuit for holding the setting potential of the read current, which is applied to the gate of said current copier transistor, when outputs of all current copier circuits are interrupted.