IP Library Assignment 024990/0153
Patent Assignment
Reel/Frame 024990/0153

Merger

Recorded: 2010-09-15 Pages: 24
Assignor
RENESAS TECHNOLOGY CORP.
Executed: 2010-04-01
Assignee
NEC ELECTRONICS CORPORATION
1753, SHIMONUMABE, NAKAHARA-KU, KAWASAKI-SHI, KANAGAWA, JAPAN
Covered Properties (54)
Microprocessor Having a Debug Interruption Function
Patent: 6,668,339 →
Application: 09/362,133 →
Integrated Circuit with Built-in Processor and Internal Bus Observing Method
Patent: 6,738,853 →
Application: 09/663,337 →
Carrier Recovery Circuit and Lock Detection Circuit for Mixed Psk Signals
Patent: 7,092,458 →
Application: 09/814,867 →
Publication: US 2002/0071502
Delay Time Estimation Method and Recording Medium Storing Estimation Program
Patent: 7,127,385 →
Application: 09/879,197 →
Publication: US 2002/0077799
Clock Selection Circuit for Selecting Between an External Clock and a Clock Generated by Comparing a Count Value with a Setting Value
Patent: 6,920,577 →
Application: 09/881,712 →
Publication: US 2002/0099969
Method for Reducing Leakage Current of Lsi
Patent: 7,167,991 →
Application: 09/901,083 →
Publication: US 2002/0091978
Data Processor Speeding Up Repeat Processing by Inhibiting Remaining Instructions After a Break in a Repeat Block
Patent: 7,010,677 →
Application: 09/921,554 →
Publication: US 2002/0133692
Cmos Image Sensor and Method of Manufacturing the Same
Patent: 7,312,098 →
Application: 09/970,879 →
Publication: US 2002/0105585
Data Processor Assigning the Same Operation Code to Multiple Operations
Patent: 6,925,548 →
Application: 09/971,607 →
Publication: US 2002/0120830
Method of and Device for Detecting Cable Connection
Patent: 7,082,545 →
Application: 09/971,674 →
Publication: US 2002/0156949
Capture of Residual Refractory Metal Within Semiconductor Device
Patent: 7,180,153 →
Application: 09/983,166 →
Publication: US 2002/0140097
A Soft Error Resistant Semiconductor Memory Device
Patent: 6,693,820 →
Application: 10/061,276 →
Publication: US 2002/0181273
Automatic Gain Control Circuit and Automatic Gain Control Method
Patent: 7,116,733 →
Application: 10/139,368 →
Publication: US 2002/0191717
Information Processing Unit Selecting One of Reset Vector Addresses
Patent: 7,191,323 →
Application: 10/157,884 →
Publication: US 2004/0078664
Dma Controller Having a Trace Buffer
Patent: 7,143,205 →
Application: 10/163,507 →
Publication: US 2002/0194401
Semiconductor Device and Test System Therefor
Patent: 7,080,302 →
Application: 10/163,579 →
Publication: US 2003/0011396
Imaging Device with Suppressed Inter-Column Variations
Patent: 7,139,026 →
Application: 10/166,198 →
Publication: US 2003/0117509
Semiconductor Memory
Patent: 7,003,622 →
Application: 10/167,087 →
Publication: US 2003/0028710
Modulator
Patent: 6,734,814 →
Application: 10/167,460 →
Publication: US 2003/0117306
Data/Clock Recovery Circuit for Recovering Data and Clock Signal with High Accuracy
Patent: 7,120,216 →
Application: 10/193,064 →
Publication: US 2003/0142773
Memory Circuit
Patent: 7,237,175 →
Application: 10/193,319 →
Publication: US 2003/0046632
Microcomputer and Debugging System
Patent: 6,961,872 →
Application: 10/193,325 →
Publication: US 2003/0046610
Disconnection Detecting Circuit Detecting Disconnection Based on a Change in Detection Signal
Patent: 6,687,140 →
Application: 10/211,305 →
Publication: US 2003/0151934
Synchronous Clock Phase Control Circuit
Patent: 7,116,746 →
Application: 10/235,957 →
Publication: US 2003/0190004
Multi-Port Memory Circuit
Patent: 6,885,608 →
Application: 10/267,800 →
Publication: US 2003/0198120
Electrostatic Breakdown Prevention Circuit for Semiconductor Device
Patent: 6,847,512 →
Application: 10/267,876 →
Publication: US 2003/0193765
Access Controller That Efficiently Accesses Synchronous Semiconductor Memory Device
Patent: 6,948,046 →
Application: 10/317,127 →
Publication: US 2003/0229750
Floorplanning Apparatus Deciding Floor Plan Using Logic Seeds Associated with Hierarchical Blocks
Patent: 6,938,232 →
Application: 10/320,635 →
Publication: US 2003/0229874
Impedance Control Circuit for Controlling Multiple Different Impedances with Single Control Circuit
Patent: 6,815,979 →
Application: 10/323,834 →
Publication: US 2004/0000926
Electronic Apparatus with Rom Data Correction Function
Patent: 6,931,476 →
Application: 10/330,123 →
Publication: US 2004/0015639
Semiconductor Memory Unit with Repair Circuit
Patent: 7,203,870 →
Application: 10/330,165 →
Publication: US 2004/0078701
Data Transfer Device for Transferring Data Between Blocks of Different Clock Domains
Patent: 6,911,843 →
Application: 10/352,164 →
Publication: US 2004/0027167
Connection Verification Apparatus for Verifying Interconnection Between Multiple Logic Blocks
Patent: 7,197,693 →
Application: 10/352,231 →
Publication: US 2004/0019840
Fault Simulator for Verifying Reliability of Test Pattern
Patent: 7,096,384 →
Application: 10/367,785 →
Publication: US 2004/0088627
Cache Memory for Invalidating Data or Writing Back Data to a Main Memory
Patent: 6,918,011 →
Application: 10/383,520 →
Publication: US 2004/0049637
Semiconductor Integrated Circuit Device Having a Test Circuit of a Random Access Memory
Patent: 6,964,000 →
Application: 10/383,553 →
Publication: US 2004/0059976
In-Circuit Emulator System with Changeable Clock Frequency
Patent: 7,120,831 →
Application: 10/409,579 →
Publication: US 2004/0078671
System-In-Package Type Semiconductor Device
Patent: 6,925,018 →
Application: 10/411,271 →
Publication: US 2004/0085796
Semiconductor Testing Device
Patent: 6,784,686 →
Application: 10/430,271 →
Publication: US 2004/0103357
Parasitic Element Extraction Apparatus
Patent: 6,772,404 →
Application: 10/431,535 →
Publication: US 2004/0103384
Ip (Intellectual Property) Generating System
Patent: 6,934,918 →
Application: 10/441,221 →
Publication: US 2004/0068557
Wiring Design Support Apparatus for Bond Wire of Semiconductor Devices
Patent: 7,725,847 →
Application: 10/586,908 →
Publication: US 2008/0250363
Semiconductor Integrated Circuit Capable of Facilitating Layout Modification
Patent: 6,954,919 →
Application: 10/606,830 →
Publication: US 2004/0088667
Trace Control Circuit Adapted for High-Speed Microcomputer Operation
Patent: 6,996,704 →
Application: 10/639,582 →
Publication: US 2004/0049665
Data Transfer Control Circuit in System Lsi
Patent: 7,017,000 →
Application: 10/679,279 →
Publication: US 2004/0205277
Data Transfer Control Apparatus
Patent: 7,240,138 →
Application: 10/689,668 →
Publication: US 2004/0205278
Semiconductor Integrated Circuit with Test Circuit
Patent: 7,149,942 →
Application: 10/725,028 →
Publication: US 2004/0117706
Method of and Apparatus for Decoding and Displaying Video That Improves Quality of the Video
Patent: 7,346,112 →
Application: 10/730,907 →
Publication: US 2004/0228412
Asynchronous Data Transmitting Apparatus
Patent: 7,376,190 →
Application: 10/731,026 →
Publication: US 2004/0202253
Protective Circuit for Semiconductor Device
Patent: 6,980,409 →
Application: 11/003,332 →
Publication: US 2005/0094334
Method of and Device for Detecting Cable Connection Using an Oscillation Circuit and a Counter
Patent: 7,334,151 →
Application: 11/447,898 →
Publication: US 2006/0248365
Communication apparatus
Application: 11/653,386 →
Publication: US 2007/0189471
Method of and Device for Detecting a Cable Connection with a Root Hub
Patent: 7,797,557 →
Application: 11/826,371 →
Publication: US 2007/0260902
Asynchronous Data Transmitting Apparatus
Patent: 7,515,639 →
Application: 12/024,885 →
Publication: US 2008/0130763
Related Assignments (17)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest Aug 6, 2001
From: MATSUO, MASAHITO
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 012060/0979 →
Assignment of Assignor's Interest Oct 5, 2001
From: KIMURA, MASATOSHI
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 012235/0007 →
Assignment of Assignor's Interest Oct 9, 2001
From: KUBO, KENJI; TANAKA, WATARU; MAEMURA, HIROYUKI
To: MITSUBISHI DENKI KABUSHIKI KAISHA; MITSUBISHI ELECTRIC SYSTEMS LSI DESIGN CORP.
Reel/Frame 012241/0761 →
Assignment of Assignor's Interest Oct 9, 2001
From: MATSUO, MASAHITO
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 012233/0723 →
Assignment of Assignor's Interest Oct 23, 2001
From: KAMINO, TAKESHI; TSUTSUMI, TOSHIAKI; KODAMA, SHUJI; OHNO, TAKIO
To: MITSUBISHI DENKI KABUSHIKI KAISHA
Reel/Frame 012277/0665 →
Assignment of Assignor's Interest Sep 10, 2003
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 014502/0289 →
Assignment of Assignor's Interest Apr 7, 2004
From: MITSUBISHI DENKI KABUSHIKI KAISHA
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 015185/0122 →
Change of Name Sep 15, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 024990/0129 →
Merger Nov 2, 2017
From: RENESAS DESIGN CORP.
To: RENESAS SYSTEM DESIGN CO., LTD.
Reel/Frame 044020/0377 →
Merger Nov 2, 2017
From: RENESAS SYSTEM DESIGN CO., LTD.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044020/0503 →
Merger and Change of Name Nov 2, 2017
From: RENESAS SYSTEM DESIGN CO., LTD.; RENESAS SOLUTIONS CORPORATION
To: RENESAS SYSTEM DESIGN CO., LTD.
Reel/Frame 044020/0475 →
Change of Address Nov 2, 2017
From: RENESAS SYSTEM DESIGN CO., LTD.
To: RENESAS SYSTEM DESIGN CO., LTD.
Reel/Frame 045807/0091 →
Change of Name Nov 2, 2017
From: RENESAS LSI DESIGN CORPORATION
To: RENESAS DESIGN CORP.
Reel/Frame 044020/0347 →
Change of Name Nov 2, 2017
From: MITSUBISHI ELECTRIC SYSTEM LSI DESIGN CORPORATION
To: RENESAS LSI DESIGN CORPORATION
Reel/Frame 044020/0316 →
Change of Address Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 044020 Frame: 0377. Assignor(S) Hereby Confirms the Merger. Dec 11, 2017
From: RENESAS DESIGN CORP.
To: RENESAS MICRO SYSTEMS CO., LTD.
Reel/Frame 045645/0850 →
Change of Name Dec 11, 2017
From: RENESAS MICRO SYSTEMS CO., LTD.
To: RENESAS SYSTEM DESIGN CO., LTD.
Reel/Frame 044353/0309 →