IP Library Granted Patent US 6,842,792
Granted Patent B2
US 6,842,792 · App. 10/183,670 · Granted Jan 11, 2005

Method and/or apparatus to sort request commands for SCSI multi-command packets

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Quick Facts
Patent No.
US 6,842,792
App. No.
10/183,670
Granted
Jan 11, 2005
Kind
B2
Abstract

An apparatus comprising a plurality of IO queues and a logic circuit. The plurality of IO queues each may be configured to receive a respective IO request and present the IO request in response to a trigger signal. The logic circuit may be configured to (a) (i) receive one or more of the IO requests and (ii) serially coalesce the IO requests in response to a respective device identification (ID) of the IO requests, and (iii) present one or more of the coalesced IO requests as one or more respective context queue requests in response to the trigger signal and (b) generate the trigger signal when a current queue count is equal to a maximum queue depth.

Claims (39)

1. An apparatus comprising:

a plurality of input/output (IO) queues each (i) capable of buffering a plurality of IO requests associated with a respective device identification and (ii) configured to and present said IO requests as buffered in response to a trigger signal; and

a logic circuit configured to (i) generate a context queue request having said IO requests received from said IO queues (a) coalesced into a single sequence and (b) sorted in said sequence by said respective device identification and (ii) generate said trigger signal when a current queue count is equal to a maximum queue depth.

2. The apparatus according to claim 1 , wherein said apparatus further comprises a context queue configured to receive said context queue request.

3. The apparatus according to claim 2 , wherein said context queue is configured to present said context queue request to a context manager simultaneously with said IO queues receiving additional requests of said IO requests.

4. The apparatus according to claim 1 , wherein said logic circuit is further configured to generate said trigger signal when (i) said current queue count is equal to a maximum total count, (ii) a total count is greater than said maximum total count, and (iii) a trigger time count is greater than or equal to a maximum trigger time count.

5. The apparatus according to claim 4 , wherein said logic circuit is further configured to (i) reset said total count and said trigger time count to zero and (ii) set a trigger time to a minimum trigger time in response to said trigger signal.

6. The apparatus according to claim 1 , wherein said context queue requests comprise signals compliant with a small computer systems interface (SCSI) parallel interface (SPI) L_Q multiple command.

7. An apparatus comprising:

means for (i) receiving one or more IO requests and (ii) presenting said IO requests in response to a trigger signal;

means for serially coalescing said IO requests in response to a device identification (ID) of said IO requests;

means for presenting said coalesced IO requests as one or more respective context queue requests in response to said trigger signal;

means for generating said trigger signal when a current queue count is equal to a maximum queue depth; and

means for sequentially presenting said context queue requests in response to said trigger signal.

8. A method for coalescing a plurality of input/output (IO) requests, comprising the steps of:

(A) first queuing said IO requests sorted by a plurality of device identifications

(B) generating one or more context queue requests by serially coalescing said IO requests from said first queuing into a plurality of sequential groups each having one of said device identifications;

(C) second queuing said context queue requests; and

(D) sequentially presenting said context queue requests from said second queuing to a context manager.

9. The method according to claim 8 , further comprising the step of:

presenting said context queue requests from said second queuing simultaneously with said first queuing additional IO requests of said IO requests.

10. The method according to claim 8 , wherein each of said IO requests is presented from said first queuing by respective IO request queues in response to a trigger signal.

11. The method according to claim 10 , further comprising the step of:

generating said trigger signal when a current queue count equals a maximum total count.

12. The method according to claim 10 , further comprising the step of:

generating said trigger signal when a total count is greater than a maximum total count.

13. The method according to claim 10 , further comprising the step of:

generating said trigger signal when a trigger time count is greater than or equal to a maximum trigger time count.

14. The method according to claim 12 , further comprising the step of:

resetting said total count to zero in response to said trigger signal.

15. The method according to claim 13 , further comprising the step of:

resetting said trigger time count to zero in response to said trigger signal.

16. The method according to claim 10 , further comprising the step of:

setting a trigger time to a minimum trigger time in response to said trigger signal.

17. A computer readable medium containing one or more sets of computer executable instructions for performing the steps of claim 8 .

18. The method according to claim 8 , wherein said context queue requests comprise signals compliant with a small computer systems interface (SCSI) parallel interface (SPI) L_Q multiple command.

19. The method according to claim 10 , further comprising the step of:

generating said trigger signal when a current queue count equals a maximum total depth.

20. The method according to claim 8 , wherein said context queue request starts with an initial IO request of said IO requests stored by said first queuing.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 3, 2015
From: LSI CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035390/0388 →
CHANGE OF NAME Recorded Jun 6, 2014
From: LSI LOGIC CORPORATION
To: LSI CORPORATION
Reel/Frame 033102/0270 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →