IP Library Granted Patent US 6,960,396
Granted Patent B2
US 6,960,396 · App. 10/187,897 · Granted Nov 1, 2005

Pb-free solder-connected structure and electronic device

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Quick Facts
Patent No.
US 6,960,396
App. No.
10/187,897
Granted
Nov 1, 2005
Kind
B2
Abstract

Provided are a bonded structure by a lead-free solder and an electronic article comprising the bonded structure. The bonded structure has a stable bonding interface with respect to a change in process of time, an enough strength and resistance to occurrence of whiskers while keeping good wettability of the solder. In the bonded structure, a lead-free Sn—Ag—Bi alloy solder is applied to an electrode through an Sn—Bi alloy layer. The Sn—Bi alloy, preferably, comprises 1 to 20 wt % Bi in order to obtain good wettability of the solder. In order to obtain desirable bonding characteristics having higher reliability in the invention, a copper layer is provided under the Sn—Bi alloy layer thereby obtaining an enough bonding strength.

Claims (27)

1. A semiconductor device with a lead which is made from a lead frame, wherein the lead has a layered structure thereon which consists of a single Sn—Bi alloy layer, comprising 1 to 5 wt. % Bi, thereon, the single Sn—Bi alloy layer being provided as the single Sn—Bi alloy layer prior to forming a soldered connection of the lead.

2. A semiconductor device according to claim 1 , wherein the lead is a Cu alloy lead.

3. A semiconductor device according to claim 1 , wherein the lead is an Fe—Ni alloy lead.

4. A semiconductor device according to claim 1 , wherein a Cu layer is present between the lead and the Sn—Bi alloy layer.

5. A semiconductor device according to claim 1 , wherein a Cu layer is present between the Fe—Ni alloy lead and the Sn—Bi alloy layer.

6. A semiconductor device according to claim 1 , wherein the single Sn—Bi alloy layer is a deposited single Sn—Bi alloy layer, deposited by plating.

7. A semiconductor device according to claim 1 , wherein the Sn—Bi alloy layer has a thickness of about 10 μm.

8. A semiconductor device according to claim 1 , which is a thin small outline package.

9. A semiconductor device according to claim 1 , wherein the lead is adapted for connection to a Pb-free solder.

10. A semiconductor device according to claim 1 , wherein the lead is adapted for connection to a Pb-free solder of an Sn—Ag—Bi alloy.

11. A semiconductor device according to claim 1 , wherein the lead is adapted for connection to a Pb-free solder of an Sn—Ag—Bi—Cu alloy.

12. A semiconductor device with a lead which is made from a lead frame, wherein a layered structure which consists of a single Sn—Bi alloy layer, which comprises from 1 to 5 wt % Bi, is formed on the lead, the single Sn—Bi alloy layer being provided as the single Sn—Bi alloy layer prior to forming a soldered connection of the lead.

13. A semiconductor device according to claim 12 , wherein the lead is a Cu alloy lead.

14. A semiconductor device according to claim 12 , wherein the lead is an Fe—Ni alloy lead.

15. A semiconductor device according to claim 14 , wherein a Cu layer is present between the Fe—Ni alloy lead and the Sn—Bi alloy layer.

16. A semiconductor device according to claim 12 , wherein a Cu layer is present between the lead and the Sn—Bi alloy layer.

17. A semiconductor device with a lead which is made from a lead frame, wherein a layered structure which consists of a single Sn—Bi alloy layer, which comprises from 1 to 5 wt % Bi, is formed directly on the lead, the single Sn—Bi alloy layer being provided as the single Sn—Bi alloy layer prior to forming a soldered connection of the lead.

18. A semiconductor device with a lead which is made from a lead frame, wherein the lead includes an Sn—Bi alloy layer comprising 1 to 5 wt % Bi as a surface layer, said Sn—Bi alloy layer being provided as said Sn—Bi alloy layer prior to forming a soldered connection of the lead.

19. A semiconductor device according to claim 18 , wherein the lead is an Fe—Ni alloy lead.

20. A semiconductor device according to claim 19 , wherein a Cu layer is present between the Fe—Ni alloy lead and the Sn—Bi alloy layer.

21. A semiconductor device according to claim 18 , wherein a Cu layer is present between the lead and the Sn—Bi alloy layer.

22. A semiconductor device according to claim 18 , wherein the lead is a Cu alloy lead.

23. A semiconductor device with a lead which is made from a lead frame, wherein an Sn—Bi alloy layer, which comprises from 1 to 5 wt % Bi, is formed directly on the lead as a surface layer, said Sn—Bi alloy layer being provided as said Sn—Bi alloy layer prior to forming a soldered connection of the lead.

24. A semiconductor device according to claim 12 , wherein the single Sn—Bi alloy layer is a deposited single Sn—Bi alloy layer.

25. A semiconductor device according to claim 17 , wherein the single Sn—Bi alloy layer is a deposited single Sn—Bi alloy layer.

26. A semiconductor device according to claim 18 , wherein the Sn—Bi alloy layer is a deposited Sn—Bi alloy layer, deposited by plating.

27. A semiconductor device according to claim 23 , wherein the Sn—Bi alloy layer is a deposited Sn—Bi alloy layer, deposited by plating.

Assignments (3)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
MERGER/CHANGE OF NAME Recorded Aug 31, 2011
From: RENESAS TECHNOLOGY CORP.
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 026837/0505 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 3, 2009
From: HITACHI, LTD.
To: RENESAS TECHNOLOGY CORP.
Reel/Frame 022773/0138 →