IP Library Granted Patent US 7,013,409
Granted Patent B2
US 7,013,409 · App. 10/202,747 · Granted Mar 14, 2006

Method and apparatus for debugging a data processing system

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Quick Facts
Patent No.
US 7,013,409
App. No.
10/202,747
Granted
Mar 14, 2006
Kind
B2
Abstract

A data processing system ( 10 ) includes a CPU ( 12 ) and debug circuitry ( 16 ). CPU ( 12 ) can execute instructions which provide direct input to one or more of trigger circuitry ( 32 ), multi-function debug counters ( 34 ), combining logic ( 36 ), and action select and control logic ( 38 ). Breakpoints can be cascaded, and separate breakpoint sequences can be triggered from a same trigger. A selected trigger ( 117 ) can produce a resulting action or trigger ( 119 ) but only if it occurs in a predetermined order compared to one or more other triggers ( 117 ). Multi-function debug counters ( 34 ) can perform a wide variety of programmable functions, can be started and stopped using the same or separate triggers, and can be optionally concatenated with each other.

Claims (36)

1. A data processing system, comprising:

a central processing unit coupled to a bus; and

a debug circuit comprising:

a first breakpoint unit, coupled to the bus, for detecting a breakpoint event and providing an initial trigger output and an action output in response to detecting the breakpoint event, wherein the initial action output identifies an initial action; and

a second breakpoint unit for receiving the initial trigger output and providing an output in response to the first trigger output; and

a first cascaded breakpoint unit for receiving the initial trigger output and providing a first cascaded trigger output in response to the initial trigger output.

2. The data processing system of claim 1 , wherein:

the debug circuit further comprises a second cascaded breakpoint unit for receiving the first cascaded trigger output and providing a final action output, wherein the final action output is for identifying a final action.

3. A data processing system, comprising:

a central processing unit coupled to a bus; and

a debug circuit, comprising:

a first breakpoint unit, coupled to the bus, for detecting a breakpoint event and providing a first output in response to detecting the breakpoint event; and

a first plurality of serially-connected breakpoint units for receiving the first output at a front end of the serially-connected breakpoints and providing a final output in response to the first output at a back end of the serially-connected breakpoints, wherein the final output is for identifying an action.

4. The data processing system of claim 3 , wherein the debug circuit further comprises a second breakpoint unit for receiving the first output and providing a second output responsive to the first output.

5. A debug circuit, comprising:

first breakpoint means for detecting a breakpoint event and providing a first output in response to detecting the breakpoint event, wherein the first output is a trigger;

second breakpoint means, coupled to the first breakpoint means, for providing a second output in response to the first output, wherein the second output is an action;

third breakpoint means, coupled to the first breakpoint means, for providing a third output in response to the first output; and

a fourth breakpoint means, coupled to the third breakpoint means, for providing a fourth output in response to the second output.

6. The debug circuit of claim 5 , wherein the fourth output is one of a trigger and an action.

7. The debug circuit of claim 5 , further comprising a counter coupled to the fourth output.

8. The debug circuit of claim 5 , wherein the first breakpoint means is further characterized as providing a first action output in response to detecting the breakpoint event.

9. The debug circuit of claim 5 , wherein the first output has a first portion coupled to the second breakpoint means and a second portion that identifies an action.

10. A method of debugging with respect to a breakpoint event, comprising:

detecting the breakpoint event;

generating a first action in response to the breakpoint event;

generating a second action in response to the breakpoint event; and

comparing results of the first action and the second action.

11. The method of claim 10 , wherein the step of generating the first action comprises:

generating a first trigger in response to detecting the breakpoint event; and

generating the first action in response to the first trigger.

12. The method of claim 11 , wherein the step of generating the second action comprises:

generating the second action in response to the first trigger.

13. The method of claim 11 , wherein the step of generating the second action comprises:

generating a second trigger in response to the first trigger; and

generating the second action in response to the second trigger.

Assignments (23)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
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To: MORGAN STANLEY SENIOR FUNDING, INC.
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ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
RELEASE OF SECURITY INTEREST Recorded Jan 23, 2015
From: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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RELEASE OF SECURITY INTEREST Recorded Jan 23, 2015
From: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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From: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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From: FREESCALE SEMICONDUCTOR, INC.
To: INTEL CORPORATION
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From: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
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To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
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SECURITY AGREEMENT Recorded May 13, 2010
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
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To: CITIBANK, N.A. AS COLLATERAL AGENT
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ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 25, 2002
From: GERGEN, JOSEPH P.; DAO, TAN NHAT; HANNAH, JEROME
To: MOTOROLA, INC.
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