Method for manufacturing a multi-layer printed circuit board
View Patent ↗A method of manufacturing a multilayer printed circuit board (PCB) is provided, the PCB having blind vias connecting to power layers. A portion of the blind vias in the power layers are grouped together to form a cluster of blind vias. Signal layers, provided separate from the power layers, include signal routing channels, with at least some of the signal routing channels aligned above or below the cluster of blind vias of the power layers.
1. A method of manufacturing a multilayer printed circuit board comprising the steps of:
forming power routing circuitry on a first surface of a power layer;
forming a plurality of electrically conductive blind vias in the power layer that extend from the first surface of the power layer to a second surface of the power layer, the blind vias selectively electrically contacting the power routing circuitry and some of the blind vias being aligned to establish at least one cluster of blind vias;
providing signal routing circuitry and at least one signal routing channel on a first surface of at least one signal layer such that a portion of the signal routing circuitry is routed through at least one signal routing channel;
combining the signal layer and the power layer such that the at least one signal routing channel aligns with the at least one cluster of blind vias;
and forming a plurality of vertical, electrically conductive through-vias in the combined signal layer and the power layer such that the through-vias extend from the first surface of the signal layer to a second surface of the power layer the through-vias selectively electrically contacting the signal routing circuitry.
2. The method of claim 1 , further comprising the steps of: mounting ground layers on the first surface of the signal layer and a second surface of the signal layer prior to combining the signal layer and the power layer.
3. The method of claim 1 , wherein the steps of forming the electrically conductive through-vias and blind vias further comprises the step of: selectively seeding the through-vias and the blind vias with a electrically conductive material.
4. The method of claim 3 , further comprising the step of: mounting contact elements to the selectively seeded through-vias and blind vias.
5. The method of claim 1 , wherein the steps of forming the electrically conductive through-vias and blind vias further comprises the step of: selectively plating the through-vias and the blind vias with a electrically conductive material.
6. The method of claim 5 , further comprising the step of: mounting contact elements to the selectively plated through-visa and blind vias.
7. A method of manufacturing a multilayer printed circuit board comprising the steps of:
providing power routing circuitry on at least first surfaces of a plurality of power layers; aligning the power layers; combining the aligned power layers into a first subassembly having a top power layer and a bottom power layer;
forming a plurality of electrically conductive blind vias in the first subassembly that extend from a first surface of the top power layer to a second surface of the bottom power layer, the plurality of blind vias selectively electrically connecting the power routing circuitry in the first subassembly, at least a portion of the plurality of blind vias being aligned to establish at least one cluster of blind vias;
providing signal routing circuitry and at least one signal routing channel on at least first surfaces of a plurality of signal layers such that at least a portion of the signal routing circuitry is routed through the at least one signal routing channel on the signal layers;
aligning the signal layers;
combining the aligned signal layers into a second subassembly having a top signal layer and a bottom signal layer;
aligning the first subassembly and the second subassembly such that the at least one signal routing channel in the signal layers aligns with the at least one cluster of blind vias in the power layers;
combining the aligned first subassembly and the second subassembly into a final assembly having a top signal layer and a bottom power layer; and
forming a plurality of electrically conductive, vertical through-vias in the final assembly such that the through-vias extend from a first surface of the top signal layer to a second surface of the bottom power layer, the through-vias selectively electrically connecting with some of the signal routing circuitry in the first subassembly of signal layers.
8. The method of claim 7 , further comprising the steps of: mounting ground layers on the first surface and the second surface of the signal layers prior to combining the signal layers into a second subassembly.
9. The method of claim 7 , further comprising the step of: selectively seeding the through-vias and the blind vias with a electrically conductive material.
10. The method of claim 9 , further comprising the step of: mounting contact elements to the selectively seeded through-vias and blind vias.
11. The method of claim 7 , further comprising the step of: selectively plating the through-vias and the blind vias with a electrically conductive material.
12. The method of claim 11 , further comprising the step of: mounting contact elements to the selectively plated through-visa and blind vias.