Heterojunction bipolar transistor and semiconductor integrated circuit device using the same
View Patent ↗A heterojunction bipolar transistor has a raised breakdown voltage and restrains the rising characteristic of I C -V CE characteristic from degrading. The collector region includes first, second, and third collector layers of semiconductor. The first collector layer is made of a doped or undoped semiconductor in such a way as to contact the sub-collector region. The second collector layer is made of a doped or undoped semiconductor having a narrower band gap than the first collector layer in such a way as to contact the base region. The third collector layer has a higher doping concentration than the second collector layer in such a way as to be located between or sandwiched by the first collector layer and the second collector layer.
1. A heterojunction bipolar transistor comprising:
a sub-collector region made of semiconductor of a first conductivity type;
a collector region made of semiconductor of the first conductivity type in contact with the sub-collector region;
a collector electrode spaced apart from the collector region and in contact with the sub-collector region;
a base region made of semiconductor of a second conductivity type in contact with the collector region;
an emitter region made of semiconductor of the first conductivity type in contact with the base region;
the collector region including:
a first collector layer made of InGaP, which contains a natural superlattice having regularly arranged In atoms and Ga atoms in a group-III atomic layer, in contact with the sub-collector region;
a second collector layer made of semiconductor of the first conductivity type or undoped semiconductor, said second collector layer (a) having a larger thickness than the first collector layer, and (b) having a narrower band gap than the first collector layer, in contact with the base region; and
a third collector layer made of semiconductor of the first conductivity type having a higher doping concentration than the second collector layer located between the first collector layer and the second collector layer,
wherein the collector region is sandwiched between the sub-collector region and the base region.
2. The transistor according to claim 1 , wherein the third collector layer includes a same semiconductor as the first collector layer or the second collector layer.
3. The transistor according to claim 1 , wherein the third collector layer is made of semiconductor including GaAs.
4. The transistor according to claim 1 , wherein the third collector layer is made of a mixed semiconductor crystal selected from the group consisting of InGaAs, AlGaAs, InAlAs, and InAlGaAs.
5. The transistor according to claim 1 , wherein the second collector layer is made of semiconductor including GaAs.
6. The transistor according to claim 1 , wherein the second collector layer is made of a mixed semiconductor crystal selected from the group consisting of InGaAs, AlGaAs, InAlAs, and InAlGaAs.
7. The transistor according to claim 1 , wherein the third collector layer has a thickness of 10 nm or less.
8. The transistor according to claim 1 , wherein the third collector layer is made of at least one of InGaP and GaAs.
9. The transistor according to claim 1 , wherein the first collector layer has a thickness of one-tenth or greater of a total thickness of the collector region.
10. The transistor according to claim 1 , wherein the third collector layer has a doping concentration of 5×10 17 cm −3 or greater.
11. The transistor according to claim 1 , further comprising an additional sub-collector layer having a wider band gap than the second collector layer;
wherein the additional sub-collector layer has a doping concentration of 5×10 17 cm −3 or greater, and is provided in the sub-collector region adjacent to the first collector layer.
12. A semiconductor integrated circuit device comprising a plurality of the heterojunction bipolar transistors according to claim 1 .