Complimentary bipolar transistor
An NPN transistor having an epitaxial region of an N-type silicon/P-type silicon germanium/N-type silicon structure, and a PNP transistor having an epitaxial region of a P-type silicon/N-type silicon germanium/P-type silicon structure are formed on a silicon substrate after the formation of an element-isolating oxide film. At this time, the concentration distribution of germanium in the base of each of the NPN transistor and the PNP transistor is adjusted to have a peak in the collector side, and to descend toward the emitter side. Since each epitaxial layer is independently grown, the speed performance of each transistor can be adjusted to the ultimate while maintaining practical withstand voltage.
1. A semiconductor device comprising:
a vertical NPN bipolar transistor and a vertical PNP bipolar transistor each having a collector layer, a base layer, and an emitter layer formed on a common silicon substrate, wherein
each of said vertical NPN bipolar transistor and said vertical PNP bipolar transistor comprises
a first epitaxial layer formed on the surface of said silicon substrate,
an isolation insulating film disposed on the surface of said first epitaxial layer,
a first portion of said collector layer formed on the surface of said first epitaxial layer and surrounded by said isolation insulating film, and
a second epitaxial layer extending on said first epitaxial layer and said isolation insulating film; and wherein
said second epitaxial layer comprises a silicon layer as a second portion of said collector layer, a silicon germanium layer as said base layer, and a silicon layer as said emitter layer in the order from the bottom.
2. The semiconductor device according to claim 1 , wherein each of said second epitaxial layers forms a polycrystalline silicon layer or an amorphous silicon layer on said isolation insulating film, and said polycrystalline silicon layer or said amorphous silicon layer composes a leading electrode of said base layer.
3. The semiconductor device according to claim 1 , wherein a suicide layer is formed on a leading electrode of said base layer.
4. The semiconductor device according to claim 1 , wherein the germanium concentration in the base layer of said vertical PNP bipolar transistor is gradually descended from said collector side toward said emitter side so as to be maximum at a junction between said collector layer and said base layer, and to be minimum at a junction between said emitter layer and said base layer.
5. The semiconductor device according to claim 1 , wherein the germanium concentration in the base layer of said vertical PNP bipolar transistor is gradually descended from said collector side toward said emitter side so as to be maximum in a depletion layer formed at a junction of said collector layer and said base layer, and to be minimum in a depletion layer formed at a junction of said emitter layer and said base layer.
6. The semiconductor device according to claim 1 , wherein the germanium concentration in the base layer of said vertical PNP bipolar transistor is gradually descended from said collector side toward said emitter side so as to take a maximum value having a certain width in a depletion layer formed at a junction of said collector layer and said base layer, and to be minimum in a depletion layer formed at a junction of said emitter layer and said base layer.
7. The semiconductor device according to claim 1 , wherein the germanium concentration in the base layer of said vertical PNP bipolar transistor is constant in said base, and descends steeply to a minimum in a depletion layer formed at a junction of said collector layer and said base layer, and in a depletion layer formed at a junction of said emitter layer and said base layer.
8. The semiconductor device according to claim 7 , wherein an impurity concentration in said emitter in the vicinity of the junction between said base layer and said emitter layer of said vertical PNP bipolar transistor is the same as or lower than an impurity concentration in said base.