IP Library Granted Patent US 7,061,499
Granted Patent B2
US 7,061,499 · App. 10/262,673 · Granted Jun 13, 2006

Image drawing apparatus

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Quick Facts
Patent No.
US 7,061,499
App. No.
10/262,673
Granted
Jun 13, 2006
Kind
B2
Abstract

An image drawing apparatus includes a first data reading unit which stores a source image data into a first image data buffer. A second data reading unit reads a destination image data from a destination area of a memory device and stores the destination image data into a second image data buffer. A third data reading unit reads a transmission coefficient data from the memory device and stores the transmission coefficient data into a transmission coefficient data buffer. A transmission drawing processing control unit executes a transmission drawing processing for the source image data and the destination image data by using the transmission coefficient data to generate a processed image data. The transmission coefficient data has a block size that is the same as a block size of the source image data, and contains transmission coefficients that are varied with respect to every pixel of the source image data.

Claims (19)

1. An image drawing apparatus which performs a bit block transfer operation for image data stored in an arbitrary block area of a first memory, comprising:

a first data reading unit storing a source image data into a first image data buffer;

a second data reading unit reading a destination image data from a destination area of the first memory and storing the destination image data into a second image data buffer;

a third data reading unit reading a transmission coefficient data from a second memory and storing the transmission coefficient data into a transmission coefficient data buffer; and

a transmission drawing processing control unit executing a transmission drawing processing for the source image data of the first image data buffer and the destination image data of the second image data buffer by using the transmission coefficient data of the transmission coefficient data buffer to generate a processed image data,

wherein the transmission coefficient data, which the third data reading unit reads from the second memory, has a block size that is the same as a block size of the source image data, and contains transmission coefficients that are varied with respect to every pixel of the source image data.

2. The image drawing apparatus of claim 1 , wherein the source image data is transmitted from an external control device to the image drawing apparatus through an interface and stored in the first image data buffer by the first data reading unit.

3. The image drawing apparatus of claim 1 , wherein the transmission drawing processing control unit is provided with a conversion unit that receives a bi-level image data sent from an external control device through the first image data buffer and converts the bi-level image data into a multiple-level image data, and the transmission drawing processing control unit executes the transmission drawing processing by using the multiple-level image data, produced by the conversion unit, as the source image data.

4. The image drawing apparatus of claim 1 , wherein the source image data stored in the first image data buffer is a bi-level image data.

5. The image drawing apparatus of claim 1 , further comprising a processed image data writing unit which receives the processed image data, generated by the transmission drawing processing control unit, and writes the processed image data to the destination area of the first memory in accordance with a data writing request from the transmission drawing processing control unit.

6. The image drawing apparatus of claim 5 , wherein the processed image data writing unit is provided with a processed image data, buffer which temporarily stores the processed image data, generated by the transmission drawing processing control unit, so that the processed image data writing unit writes the stored image data to the destination area of the first memory.

7. The image drawing apparatus of claim 5 , further comprising an address generating unit which receives, in accordance with a data writing request from the processed image data writing unit, a position information indicating a starting point of the destination area of the first memory and a length information indicating both a lateral length and a longitudinal length of the destination area of the first memory, the address generating unit computing an address of the destination area of the first memory where the processed image data is to be written.

8. The image drawing apparatus of claim 1 , wherein the transmission drawing processing control unit executes the transmission drawing processing in accordance with operation formula: Dn=Ds×α+Dd×(1−α), where Ds indicates the source image data, Dd indicates the destination image data, α indicates the transmission coefficient data (0<α<1), and Dn indicates the processed image data.

9. The image drawing apparatus of claim 1 , wherein the first data reading unit reads the source image data from a source area of a third memory and stores the source image data into the first image data buffer.

10. The image drawing apparatus of claim 9 , further comprising an address generating unit which receives, in accordance with a data reading request from the first data reading unit, a position information indicating a starting point of a specified block area of the third memory and a length information indicating both a lateral length and a longitudinal length of the specified block area of the third memory, the address generating unit computing an address of the specified block area of the third memory where the source image data is to be read.

11. The image drawing apparatus of claim 9 , wherein the first memory, and the second memory, and the third memory are constituted by a memory device.

12. The image drawing apparatus of claim 1 , further comprising an address generating unit which receives, in accordance with a data reading request from the third data reading unit, a position information indicating a starting point of a specified block area of the second memory and a length information indicating both a lateral length and a longitudinal length of the specified block area of the second memory, the address generating unit computing an address of the specified block area of the second memory where the transmission coefficient data is to be read.

13. The image drawing apparatus of claim 1 , further comprising an address generating unit which receives, in accordance with a data reading request from the second data reading unit, a position information indicating a starting point of the destination area of the first memory and a length information indicating both a lateral length and a longitudinal length of the destination area of the first memory, the address generating unit computing an address of the destination area of the first memory where the destination image data is to be read.

14. The image drawing apparatus of claim 1 , wherein the first memory and the second memory are constituted by a memory device.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0337 →
CHANGE OF NAME Recorded Jul 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 024794/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 10, 2008
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 021985/0715 →
RECORD TO CORRECT 2ND ASSIGNOR'S NAME. DOCUMENT PREVIOUSLY RECORDED ON REEL 013586 FRAME 0236 ASSIGNOR HEREBY CONFIRMS THE ASSIGNMENT OF THE ENTIRE INTEREST. Recorded May 1, 2003
From: YAMADA, ATSUSHI; NISHI, HIDEFUMI
To: FUJITSU LIMITED
Reel/Frame 014018/0429 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 17, 2002
From: YAMADA, ATSUSHI; HISHI, HIDEFUMI
To: FUJITSU LIMITED
Reel/Frame 013586/0236 →