IP Library Granted Patent US 7,058,474
Granted Patent B2
US 7,058,474 · App. 10/265,074 · Granted Jun 6, 2006

Multi-layer printed circuit board fabrication system and method

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Quick Facts
Patent No.
US 7,058,474
App. No.
10/265,074
Granted
Jun 6, 2006
Kind
B2
Abstract

A method for aligning an image to be recorded by a direct image scanner on an upper layer of a printed circuit board with an image recorded on a lower layer thereof, the method comprising: visually imaging a portion of the image on the lower layer; and recording a pattern on the upper layer, referenced to coordinates of the visual image of the portion.

Claims (3)

1. A method of image alignment, comprising:

producing an array of elements on a multi-layered substrate comprising at least two layers adhered together, said array being defined by vias passing through at least a first layer and not passing through a second layer of said multi-layered substrate; and

matching said pattern with an identical pattern, such that said image is aligned with a portion of an electrical circuit already formed on a layer of said multi-layered substrate, when the patterns overlay each other.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Jul 5, 2016
From: JPMORGAN CHASE BANK, N.A.
To: ORBOTECH LIMITED
Reel/Frame 039256/0711 →
PATENT SECURITY AGREEMENT Recorded Mar 7, 2016
From: ORBOTECH LTD.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 038021/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 16, 2003
From: GANOT, AMNON; GINO, HANAN; HANINA, GOLAN; KANTOR, ZEEV; KLING, BORIS; SPINZI, SHABTAY; BEN-EZRA, BARRY
To: ORBOTECH LTD.
Reel/Frame 013667/0095 →