Method for fabricating semiconductor devices having dual gate oxide layers
A method for forming a dual gate oxide layer, including the steps of: a) forming a gate oxide layer on a semiconductor substrate; and b) increasing a thickness of a part of the gate oxide layer by performing a decoupled plasma treatment. Additional heat processes are not necessary because the dual gate oxide layer is formed with the decoupled plasma. Also, the channel characteristic of the semiconductor device can be ensured because the silicon substrate is not damaged. Furthermore, because the threshold voltage in the cell region is increased without additional channel ion implantation, the electrical characteristic of the semiconductor device can be enhanced.
1. A method for forming a dual gate oxide layer comprising the steps of a) forming a gate oxide layer on a semiconductor substrate; and b) increasing a thickness of a part of the gate oxide layer by performing a decoupled plasma treatment on said part of the gate oxide layer with a gas mixture comprising a nitrogen(N) element, an oxygen(O) element and a halogen element, said decoupled plasma treatment displacing oxygen atoms in said part of the gate oxide layer which react with said part of the gate oxide layer and the substrate to increase the thickness of said part of the gate oxide layer.
2. The method as recited in claim 1 , comprising maintaining the semiconductor substrate at a temperature ranging from about 0° C. to about 500° C. during the decoupled plasma treatment.
3. The method as recited in claim 1 , comprising performing the decoupled plasma treatment at a pressure ranging from about 10 mtorr to about 30 mtorr.
4. The method as recited in claim 1 , comprising injecting a N 2 gas at a flow rate ranging from about 10 sccm to about 500 sccm during the decoupled plasma treatment converting the nitrogen gas to free nitrogen atoms which displace oxygen atoms in said part of the gate oxide layer.
5. The method as recited in claim 1 , comprising applying a RF source power ranging from about 100 W to about 1000 W for a time period ranging from about 5 seconds to about 300 seconds during the decoupled plasma treatment.
6. The method as recited in claim 1 , wherein the gas comprising the N element is a material selected from the group consisting of NH 3 , N 2 O, and NO.
7. The method as recited in claim 1 , wherein the gas comprising the O element is a material selected from the group consisting of O 2 , O 3 , and H 2 O.
8. The method as recited in claim 1 , wherein the gas comprising the halogen element is a material selected from the group consisting of Cl 2 , BCl 3 , CF 4 , CHF 3 , C 2 F 6 , BF 2 , F 2 , NF 3 , SF 6 , HBr, Br 2 , and I 2 .
9. The method as recited in claim 1 , further comprising heating the semiconductor substrate to a temperature ranging from about 100° C. to about 900° C. for a time period ranging from about 1 minute to about 30 minutes during the decoupled plasma treatment.
10. The method as recited in claim 1 , comprising stacking the gate oxide layer up to a thickness ranging from about 5× to about 100× before further processing the decoupled plasma treatment with a nitrogen gas.
11. The method as recited in claim 1 , wherein the gate oxide layer is a material selected from the group consisting of a silicon oxide layer, Al 2 O 3 , Ta 2 O 5 , HfO 2 , ZrO 2 , TiO 2 , Hf-silicate, Zr-silicate, and metal oxide.