Electronic packages and components thereof formed by substrate-imprinting
View Patent ↗A package includes at least one electronic component mounted on a substrate formed through imprinting. In an embodiment, the substrate may comprise conductive traces, vias, and patterns of lands on one or more layers. Conductor features of different geometries may be formed by imprinting them simultaneously on one or both surfaces of an imprintable tape. Fabrication apparatus and methods, as well as application of the imprinted package to an electronic assembly, are also described.
1. An electronic package substrate comprising:
a segment of an imprintable tape;
the segment having an upper surface to mount an electronic component;
the segment having a lower surface; and
the segment having a plurality of conductor features in the upper surface and in the lower surface, wherein the plurality of conductor features are formed by imprinting them simultaneously in a conductor region of the imprintable tape encompassing only the segment, wherein the plurality of conductor features include a plurality of vias, and wherein at least a first one of the vias comprises an upper portion formed by imprinting it from the upper surface with a first die of circular cross-section extending into the segment to a depth, wherein the at least first one of the vias further comprises a lower portion formed by imprinting it from the lower surface with a second die of circular cross-section extending into the segment to meet the first die at the depth, and wherein the depth is midway between the upper and lower surfaces.
2. The substrate recited in claim 1 , wherein the conductor features comprise at least one trench and at least one via formed within the at least one trench.
3. The substrate recited in claim 1 , wherein the conductor features further comprise a plurality of trenches, and wherein the conductor features have different geometries.
4. The substrate recited in claim 3 , wherein the plurality of trenches includes trenches of different depths.
5. The substrate recited in claim 1 , wherein the plurality of vias includes a second via and a third via, the second via having a different depth than the third via.
6. The substrate recited in claim 2 , wherein the at least one trench and the at least one via are formed by simultaneously imprinting them.
7. The substrate recited in claim 6 , wherein the at least one via is located asymmetrically at the edge of the at least one trench.
8. An electronic package comprising:
a substrate having
a segment of an imprintable tape;
the segment having an upper surface to mount an electronic component;
the segment having a lower surface; and
the segment having a plurality of conductor features in the upper surface and in the lower surface, wherein the plurality of conductor features are formed by imprinting them simultaneously in a conductor region of the imprintable tape encompassing only the segment, wherein the plurality of conductor features include a plurality of vias, and wherein at least a first one of the vias is not formed within a via pad and comprises an upper portion of circular cross-section formed by imprinting it from the upper surface with a first die of circular cross-section extending into the segement to a depth, wherein the at least first one of the vias further comprises a lower portion of circular cross-section formed by imprinting it from the lower surface with a second die of circular cross-section extending into the segment to meet the first die at the depth, and wherein the depth is midway between the upper and lower surfaces; and an electronic component coupled to the substrate.
9. The electronic package recited in claim 8 , wherein the plurality of conductor features comprise at least one trench and at least one via of the plurality of vias formed within the at least one trench.
10. The electronic package recited in claim 8 , wherein the plurality of conductor features comprise a plurality of trenches, and wherein the conductor features have different geometries.
11. The electronic package recited in claim 8 , wherein the electronic component comprises an unpackaged integrated circuit.
12. The electronic package recited in claim 8 , wherein the electronic component comprises a packaged integrated circuit.
13. An electronic package substrate comprising:
a segment of an imprintable tape;
the segment having an upper surface to mount an electronic component;
the segment having a lower surface; and
the segment having a plurality of conductor features in the upper surface and in the lower surface, wherein the plurality of conductor features are formed by imprinting them simultaneously in a conductor region of the imprintable tape encompassing only the segment, wherein the plurality of conductor features include a plurality of vias, wherein at least a first one of the vias is not formed within a via pad and comprises an upper portion of circular cross-section formed by imprinting it from the upper surface with a first die of circular cross-section extending into the segment to a depth, wherein the at least first one of the vias further comprises a lower portion of circular cross-section formed by imprinting it from the lower surface with a second die of circular cross-section extending into the segment to meet the first die at the depth, and wherein the depth is midway between the upper and lower surfaces;
wherein the plurality of conductor features comprise at least one trench, and at least one via of the plurality of vias is formed within the at least one trench.
14. The substrate recited in claim 13 , wherein the conductor features comprise a plurality of trenches, and wherein the conductor features have different geometries.
15. The substrate recited in claim 14 , wherein the trenches have different depths.
16. The substrate recited in claim 14 , wherein the trenches have different widths.
17. The substrate recited in claim 13 , wherein the plurality of vias have different depths.
18. The substrate recited in claim 13 , wherein the plurality of vias have different widths.
19. The substrate recited in claim 13 , wherein the conductor features comprise at least two vias of the plurality of vias each having a different width.
20. The substrate recited in claim 13 , wherein the conductor features comprise at least two vias of the plurality of vias each having a different depth.
21. The substrate recited in claim 13 , wherein the conductor features comprise at least one via of the plurality of vias not formed within a via pad.
22. The substrate recited in claim 13 , wherein the tape is formed of material selected from the group comprising bismaleimide, driclad, epoxy, liquid crystal polymer, polycarbonate, polyester, polyether, and polyimide.
23. The substrate recited in claim 13 , wherein the tape is formed of partially-cured material selected from the group comprising bismaleimide, epoxy, polycarbonate, polyester, and polyimide.
24. The substrate recited in claim 23 , wherein the partially-cured material comprises a filled polymer.
25. The substrate recited in claim 24 , wherein the filled polymer comprises material selected from the group consisting of epoxy and polyimide, wherein the selected material comprises a particle filler selected from the group consisting of alumina, fiberglass, and silica.