IP Library Granted Patent US 7,222,201
Granted Patent B2
US 7,222,201 · App. 10/338,067 · Granted May 22, 2007

Virtual endpoint for USB devices

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Quick Facts
Patent No.
US 7,222,201
App. No.
10/338,067
Granted
May 22, 2007
Kind
B2
Abstract

In a USB device, virtual endpoint capability allows a number of physical endpoints in the device to support a larger number of data pipes at logical endpoints requested by the host. This is done by re-assigning physical endpoints to support the logical endpoint requested by the host. The logical endpoints and their corresponding data pipes may be served in a round robin scheme.

Claims (42)

1. A method for assigning physical endpoints among a set of physical endpoints of a USB device to support communication pipes with a host, said method comprising:

in response to a request for a first logical endpoint for supporting a communication pipe with a host, the USB device checking whether any one of the set of physical endpoint(s) of the USB device has been assigned to support such pipe;

the USB device identifying one of the set of physical endpoint(s) of the USB device as the one to be re-assigned to the first logical endpoint to support such pipe when none of said set of physical endpoint(s) is available; and

the USB device re-assigning the identified physical endpoint of the USB device to the first logical endpoint to support such pipe in a manner transparent to the host.

2. The method of claim 1 , further comprising the USB device storing a state of said identified endpoint prior to the re-assignment.

3. The method of claim 2 , further comprising the USB device restoring said stored state of said re-assigned physical endpoint after use of the re-assigned physical endpoint to support such pipe has been completed.

4. The method of claim 1 , wherein said identified physical endpoint was previously assigned to a second logical endpoint prior to the re-assignment, said method further comprising the USB device stopping transmission of data in a pipe between said identified physical endpoint and the second logical endpoint prior to the re-assignment.

5. The method of claim 1 , wherein said identified physical endpoint was previously assigned to a second logical endpoint prior to the re-assignment, said method further comprising the USB device disabling said identified physical endpoint prior to the re-assignment.

6. The method of claim 5 , further comprising the USB device waiting for data at the identified physical endpoint to be sent to the host before disabling said identified physical endpoint.

7. The method of claim 5 , further comprising the USB device storing data at the identified physical endpoint after disabling said identified physical endpoint.

8. The method of claim 1 , further comprising the USB device repeating the checking, identifying and re-assigning in response to each additional request when there are multiple requests for logical endpoints.

9. The method of claim 8 , wherein said repeating by the USB device is performed in a round-robin priority in response to the multiple requests.

10. The method of claim 8 , wherein the repeating in response to each additional request is delayed by the USB device until a predetermined amount of data has passed through a previously re-assigned physical endpoint.

11. The method of claim 1 , wherein said device sends a negative acknowledgement to the host when none of the set of physical endpoint(s) has been assigned to support such pipe.

12. The method of claim 11 , wherein the negative acknowledgement sent to the host by the device causes the host to continue sending tokens to the device to request the first logical endpoint.

13. A USB apparatus that assigns physical endpoints among a set of physical endpoints to support communication pipes with a host, said apparatus comprising:

a set of physical endpoint(s);

a circuit that responds to a request for a first logical endpoint for supporting a communication pipe with a host device by checking whether any one of the set of physical endpoint(s) has been assigned to support such pipe; and

a processor that identifies one of the set of physical endpoint(s) as the one to be re-assigned to the first logical endpoint to support such pipe when none of said set of physical endpoint(s) is available, and re-assigns the identified physical endpoint to the first logical endpoint to support such pipe in a manner transparent to the host device.

14. The apparatus of claim 13 , wherein the processor causes a state of said identified endpoint to be stored prior to the re-assignment.

15. The apparatus of claim 14 , wherein the processor causes said stored state of said re-assigned physical endpoint to be restored after use of the re-assigned physical endpoint to support such pipe has been completed.

16. The apparatus of claim 14 , further comprising a storage storing information related to the state of physical endpoint that has been re-assigned.

17. The apparatus of claim 16 , wherein the information stored relates to one or more of the following: direction of data flow, type, endpoint number, maximum packet size and data stored at the physical endpoint.

18. The apparatus of claim 13 , wherein said identified physical endpoint was previously assigned to a second logical endpoint prior to the re-assignment, wherein the processor causes transmission of data in a pipe between said identified physical endpoint and the second logical endpoint to be stopped prior to the re-assignment.

19. The apparatus of claim 13 , wherein said identified physical endpoint was previously assigned to a second logical endpoint prior to the re-assignment, wherein the processor causes said identified physical endpoint to be disabled prior to the re-assignment.

20. The apparatus of claim 19 , wherein the processor causes data at the identified physical endpoint to be sent to the device before disabling said identified physical endpoint.

21. The apparatus of claim 19 , wherein the processor causes data at the identified physical endpoint to be stored after disabling said identified physical endpoint.

22. The apparatus of claim 13 , wherein said circuit sends a negative acknowledgement to the device when none of the set of physical endpoint(s) has been assigned to support such pipe.

23. The apparatus of claim 13 , further comprising a storage storing information related to logical endpoints to which one or more of the set of physical endpoint(s) have been assigned.

24. The apparatus of claim 23 , wherein the circuit checks whether any one of the set of physical endpoint(s) has been assigned to support such pipe by comparing information in the storage to information related to the first logical endpoint.

25. The apparatus of claim 23 , wherein the processor causes information related to the first logical endpoint to be stored in the storage when re-assigning the identified physical endpoint to the first logical endpoint.

26. The apparatus of claim 13 , further comprising a storage storing information related to the physical endpoint that has been re-assigned.

27. The apparatus of claim 26 , wherein the information stored relates to one or more of the following: direction of data flow, type, endpoint number, maximum packet size and data stored at the physical endpoint.

28. The apparatus of claim 13 , the circuit repeating the checking, and the processor repeating the identifying and re-assigning in response to each additional request when there are multiple requests for logical endpoints.

29. The apparatus of claim 28 , wherein said repeating is performed in a round-robin priority in response to the multiple requests.

30. The apparatus of claim 28 , wherein the repeating in response to each additional request is delayed until a predetermined amount of data has passed through a previously re-assigned physical endpoint.

31. The apparatus of claim 13 , further comprising a storage storing information related to the logical endpoint requested in the request.

32. The apparatus o claim 13 , further comprising a second circuit providing an interrupt to the processor in response to the request.

33. The apparatus of claim 32 , said second circuit comprising a first storage storing information related to the logical endpoint requested in the request.

34. The apparatus of claim 33 , said second circuit further comprising a second storage storing information for disabling the re-assignment by the processor.

35. The apparatus of claim 34 , said second circuit further comprising a gate providing said interrupt signal in response to the information stored in the first and second storage.

36. The apparatus of claim 22 , wherein the negative acknowledgement sent to the host device by the circuit causes the host device to continue sending tokens to the apparatus to request the first logical endpoint.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 034069-0494) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: PLX TECHNOLOGY, INC.
Reel/Frame 037682/0802 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2015
From: PLX TECHNOLOGY, INC.
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035615/0767 →
PATENT SECURITY AGREEMENT Recorded Oct 28, 2014
From: PLX TECHNOLOGY, INC.
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 034069/0494 →
MERGER Recorded Mar 12, 2007
From: NETCHIP TECHNOLOGY, INC.
To: PLX TECHNOLOGY, INC.
Reel/Frame 018996/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2003
From: AUGUSTIN, RYAN; RAAUM, DAVID; AUGUSTIN, REID
To: NETCHIP TECHNOLOGY, INC.
Reel/Frame 014117/0677 →