IP Library Granted Patent US 6,858,542
Granted Patent B2
US 6,858,542 · App. 10/346,263 · Granted Feb 22, 2005

Semiconductor fabrication method for making small features

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Quick Facts
Patent No.
US 6,858,542
App. No.
10/346,263
Granted
Feb 22, 2005
Kind
B2
Abstract

A semiconductor fabrication method that includes forming a film ( 109 ) comprising an imaging layer ( 112 ) and an under layer ( 110 ) over a semiconductor substrate ( 102 ). The imaging layer ( 112 ) is patterned to produce a printed feature ( 116 ) having a printed dimension ( 124 ). The under layer ( 110 ) is then processed to produce a sloped sidewall void ( 120 ) in the under layer ( 110 ) wherein the void ( 120 ) has a finished dimension ( 126 ) in proximity to the underlying substrate that is less than the printed dimension. Processing the under layer ( 110 ) may include exposing the wafer to high density low pressure N 2 plasma.

Claims (32)

1. A semiconductor fabrication method, comprising:

forming a polymeric disposable film over a semiconductor substrate;

forming a silicon-containing photoresist film on an upper surface of the disposable film;

defining a feature having a printed dimension in the photoresist film; and

processing the disposable film under the printed feature using the photoresist film with the defined feature as a mask to produce a void characterized by sloped sidewalls wherein a dimension of the void proximal to the substrate is smaller than the printed dimension.

2. The method of claim 1 , wherein a thickness of the silicon-containing photoresist film is in the range from approximately 500 to 3000 angstroms.

3. The method of claim 2 , wherein a silicon content of the photoresist layer is in the range of approximately 6 to 15 percent by weight.

4. The method of claim 2 , wherein the disposable film comprises a photo insensitive polymer layer having a thickness of approximately 3500 to 5000 angstroms.

5. The method of claim 1 , wherein processing the disposable film comprises exposing the film to a high density, low pressure plasma.

6. The method of claim 5 , wherein the plasma is further characterized as a nitrogen (N 2 ) plasma.

7. The method of claim 6 , wherein the semiconductor substrate is maintained at a temperature of less than 10° C. during the processing of the disposable film.

8. A semiconductor fabrication method, comprising:

forming a bilayer resist comprising an imaging layer and an under layer over a semiconductor substrate;

patterning the imaging layer to produce a printed feature having a printed dimension; and

exposing the water to a N 2 -based plasma in a plasma reactor chamber to produce a void in the under layer wherein the void has a finished dimension in proximity to the underlying substrate, wherein the finished dimension of the void is less than the printed dimension; and

etching the substrate using the under layer as an etch mask to form an integrated circuit feature in the substrate wherein dimension of the integrated circuit feature is determined by the finished dimension of the under layer void.

9. The method of claim 8 , wherein the imaging layer comprises a silicon-containing photoresist having a thickness of approximately 500 to 3000 angstroms.

10. The method of claim 9 , wherein a silicon content of the imaging layer is in the range of approximately 6 to 15 percent by weight.

11. The method of claim 9 , wherein the under layer comprises a polymer layer having a thickness of approximately 3500 to 15000 angstroms.

12. The method of claim 8 , wherein N 2 is the only gas introduced into the chamber during the processing of the under layer.

13. The method of claim 8 , wherein the semiconductor substrate is maintained at a temperature of less than 10° C.

14. The method of claim 8 , wherein the reactor is maintained at a pressure of less than 15 mT.

15. The method of claim 8 , wherein the under layer void is characterized by sloped and substantially straight sidewalls having a slope between approximately 70° to 89° relative to an upper surface of the substrate.

16. A semiconductor fabrication method, comprising:

forming a polymeric disposable film over a semiconductor substrate;

forming a photoresist film on an upper surface of the disposable film;

defining an opening having a printed dimension in the photoresist film over the disposable film;

processing the disposable film under the opening with a high density nitrogen plasma to produce a void characterized by sloped sidewalls wherein a dimension of the void proximal to the substrate is smaller than the printed dimension; and

etching the substrate using the processed disposable layer as an etch mask to form an integrated circuit feature in the substrate wherein a dimension of the integrated circuit feature is determined by the dimension of the void proximal to the substrate.

17. The method of claim 16 , wherein the disposable film comprises a photo insensitive polymeric film and wherein the photoresist film comprises a silicon-containing photoresist.

18. The method of claim 17 , wherein a thickness of the silicon-containing photoresist is in the range of approximately 500 to 3000 angstroms and a thickness of the polymer film is in the range of 3500 to 15000 angstroms.

19. The method of claim 16 , wherein processing the disposable layer is further characterized as processing the disposable layer with a plasma density in excess of 10 11 ions/cm 3 at a pressure of less than 15 mT and a temperature of less than 10° C.

Assignments (17)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE LISTED CHANGE OF NAME SHOULD BE MERGER AND CHANGE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0180. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 12, 2017
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 041354/0148 →
CHANGE OF NAME Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR INC.
To: NXP USA, INC.
Reel/Frame 040652/0180 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0553 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0225 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037356/0143 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →