IP Library Granted Patent US 7,792,235
Granted Patent B2
US 7,792,235 · App. 10/351,590 · Granted Sep 7, 2010

Dynamic phase tracking using edge detection

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Quick Facts
Patent No.
US 7,792,235
App. No.
10/351,590
Granted
Sep 7, 2010
Kind
B2
Abstract

A phase-locked loop includes a sample selector configured to select a set of samples from an oversampled portion of a data signal, a dynamic phase decision control configured to indicate whether a predetermined number of edges is present in the set of samples, and a phase detector configured to determine a skew condition and a direction of the skew condition of the set of samples based on the indication of the dynamic phase decision control. The phase detector is configured to determine a skew condition based on a relation between a threshold and a number of skew errors detected in the set of samples. A value of the threshold is selected according to the indication of the dynamic phase decision control. A lower value of the threshold is selected according to an indication of the dynamic phase decision control that only one edge is present in the set of samples. Furthermore, the dynamic phase decision control includes an edge detector configured to detect edges in the set of samples, and an edge counter configured to indicate the detection of the predetermined number of edges in the set of samples. Methods of determining a skew condition and a direction of the skew condition, and methods of determining whether a predetermined number of edges is present in the set of samples, are implemented using these elements.

Claims (29)

1. A method of signal processing, said method comprising:

selecting a set of samples from an oversampled portion of a data signal;

determining whether a predetermined number of edges is present in the set of samples; and

determining a skew condition and a direction of the skew condition of the set of samples,

wherein said determining the skew condition is based on said determining the presence of the predetermined number of edges,

said determining the skew condition includes counting a number of oversampled bits having skew errors and comparing the number to a threshold, and wherein a value of the threshold is selected based on said determining whether the predetermined number of edges is present in the set of samples, and

a lower value of the threshold is selected based on a determination that only one edge is present in the set of samples.

2. A method of signal processing, said method comprising:

selecting a set of samples from an oversampled portion of a data signal;

determining whether a predetermined number of edges is present in the set of samples; and

determining a skew condition and a direction of the skew condition of the set of samples,

wherein said determining the skew condition is based on said determining the presence of the predetermined number of edges, said determining the skew condition includes:

counting a number of oversampled bits having skew errors and comparing the number to a threshold, and wherein a value of the threshold is selected based on said determining whether the predetermined number of edges is present in the set of samples, and producing a set of skew detection signals, and filtering the set of skew detection signals,

wherein said filtering the set of skew detection signals includes producing a set of phase adjustment signals based on the set of skew detection signals, and based on the set of phase adjustment signals, selecting a set of samples from a second oversampled portion of the data signal.

3. A method of signal processing, said method comprising:

selecting a set of samples from an oversampled portion of a data signal;

determining whether a predetermined number of edges is present in the set of samples, said determining whether the predetermined number of edges is present in the set of samples includes detecting an absence of edges in the set of samples, and inhibiting a filtering of skew detection signals based on said detecting an absence of edges in the set of samples; and

determining a skew condition and a direction of the skew condition of the set of samples,

wherein said determining the skew condition is based on said determining the presence of the predetermined number of edges,

said determining the skew condition includes counting a number of oversampled bits having skew errors and comparing the number to a threshold, and wherein a value of the threshold is selected based on said determining whether the predetermined number of edges is present in the set of samples.

4. A phase-locked loop comprising:

a sample selector configured to select a set of samples from an oversampled portion of a data signal;

a dynamic phase decision control configured to indicate whether a predetermined number of edges is present in the set of samples; and

a phase detector configured to determine a skew condition and a direction of the skew condition of the set of samples based on the indication of the dynamic phase decision control,

wherein said phase detector is configured to determine a skew condition based on a relation between a threshold and a number of skew errors detected in the set of samples, and wherein a value of the threshold is selected according to the indication of said dynamic phase decision control, and

wherein a lower value of the threshold is selected according to an indication of said dynamic phase decision control that only one edge is present in the set of samples.

5. The phase-locked loop according to claim 4 , wherein said dynamic phase decision control comprises:

an edge detector configured to detect edges in the set of samples; and

an edge counter configured to indicate the detection of the predetermined number of edges in the set of samples.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION; MAGNUM SEMICONDUCTOR, INC.
Reel/Frame 048746/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 5, 2018
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: SK HYNIX INC.
Reel/Frame 045992/0341 →
RELEASE OF SECURITY INTEREST Recorded May 29, 2018
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 045925/0124 →
SECURITY INTEREST Recorded Jul 25, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 043095/0414 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2006
From: ICS TECHNOLOGIES, INC.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 018279/0284 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2004
From: INTEGRATED CIRCUIT SYSTEMS PTE LTD.
To: ICS TECHNOLOGIES, INC.
Reel/Frame 015237/0984 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 10, 2004
From: MEDIA REALITY TECHNOLOGIES, INC.
To: INTEGRATED CIRCUIT SYSTEMS PTE LTD.
Reel/Frame 015120/0037 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 16, 2003
From: WEI, SENG-JUN
To: MEDIA REALITY TECHNOLOGIES, INC.
Reel/Frame 014174/0215 →