IP Library Assignment 043095/0414
Patent Assignment
Reel/Frame 043095/0414

Security Interest

Recorded: 2017-07-25 Pages: 6
Assignor
INTEGRATED DEVICE TECHNOLOGY, INC.
Executed: 2017-06-28
Assignee
JPMORGAN CHASE BANK, N.A.
270 PARK AVENUE, NEW YORK, NEW YORK, 10017
Covered Properties (14)
Dynamic Phase Tracking Using Edge Detection
Patent: 7,792,235 →
Application: 10/351,590 →
Publication: US 2004/0001567
Clock Signal Generators Having Programmable Full-Period Clock Skew Control and Methods of Generating Clock Signals Having Programmable Skews
Patent: 6,977,539 →
Application: 10/648,090 →
Data Paths with Receiver Timing Fixable to a Downstream Stage and Methods of Operation Thereof
Patent: 7,134,034 →
Application: 10/686,420 →
Double Data Rate Memory Devices Including Clock Domain Alignment Circuits and Methods of Operation Thereof
Patent: 6,972,998 →
Application: 10/774,904 →
Programmable Clock Drivers That Support Crc Error Checking of Configuration Data During Program Restore Operations
Patent: 7,196,562 →
Application: 10/979,979 →
Method and Apparatus for Buffer with Programmable Skew
Patent: 7,268,599 →
Application: 11/050,009 →
Integrated Circuits and Methods with Statistics-Based Input Data Signal Sample Timing
Patent: 7,508,893 →
Application: 11/092,032 →
Clock Signal Generators Having Programmable Full-Period Clock Skew Control
Patent: 7,151,398 →
Application: 11/217,195 →
Publication: US 2006/0038601
Low Jitter Frequency Synthesizer
Patent: 7,274,231 →
Application: 11/229,472 →
Multiphase Clock Generator
Patent: 7,545,188 →
Application: 11/462,627 →
Overclocking with Phase Selection
Patent: 8,085,070 →
Application: 12/338,970 →
Publication: US 2009/0160509
Dynamic phase tracking using edge detection that employs an edge counter
Patent: 8,094,770 →
Application: 12/845,434 →
Publication: US 2010/0296615
Register Clock Driver for DDR5 Memory
Application: 15/605,408 →
Publication: US 2017/0344051
Autonomous Power and Timing System
Application: 15/616,553 →
Publication: US 2017/0357282
Related Assignments (7)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest May 25, 2017
From: PATEL, SHWETAL ARVIND
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 042510/0128 →
Assignment of Assignor's Interest Jun 23, 2017
From: SCHMITZ, RICHARD MARIA
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 042797/0632 →
Assignment of Assignor's Interest Jul 6, 2017
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: SK HYNIX INC.
Reel/Frame 042922/0851 →
Assignment of Assignor's Interest May 14, 2018
From: WEI, SEN-JUNG
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 045795/0955 →
Release of Security Interest May 29, 2018
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.
Reel/Frame 045925/0124 →
Assignment of Assignor's Interest Jun 5, 2018
From: INTEGRATED DEVICE TECHNOLOGY, INC.
To: SK HYNIX INC.
Reel/Frame 045992/0341 →
Release of Security Interest Mar 29, 2019
From: JPMORGAN CHASE BANK, N.A.
To: INTEGRATED DEVICE TECHNOLOGY, INC.; GIGPEAK, INC.; CHIPX, INCORPORATED; ENDWAVE CORPORATION
Reel/Frame 048746/0001 →