IP Library Granted Patent US 6,720,234
Granted Patent Utility
US 6,720,234 · Confirmation No. 8949

SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING INVOLVING THE SCALE-DOWN WIDTH OF SHALLOW GROOVE ISOLATION USING ROUND PROCESSING

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Code Description Pages PDF
2004-02-18 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-02-14 TRNA Transmittal of New Application 2 View
2003-02-14 A.PE Preliminary Amendment 3 View
2003-02-14 SPEC Specification 53 View
2003-02-14 CLM Claims 3 View
2003-02-14 ABST Abstract 1 View
2003-02-14 DRW Drawings-only black and white line drawings 35 View
2003-02-14 OATH Oath or Declaration filed 6 View
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Quick Facts
Patent No.
US 6,720,234
App. No.
10/366,423
Filed
2003-02-14
Granted
2004-04-13
Pub. No.
US20030148587A1
Art Unit
2824
PTA
-26 days