Protection of charge trapping dielectric flash memory devices from UV-induced charging in BEOL processing
View Patent ↗A method of protecting a charge trapping dielectric flash memory cell from UV-induced charging, including fabricating a charge trapping dielectric flash memory cell including a charge trapping dielectric charge storage layer in a semiconductor device; and during processing steps subsequent to formation of the charge trapping dielectric charge storage layer, protecting the charge trapping dielectric flash memory cell from exposure to a level of UV radiation sufficient to deposit a non-erasable charge in the charge trapping dielectric flash memory cell. In one embodiment, the step of protecting is carried out by selecting processes in BEOL fabrication which do not include use, generation or exposure of the semiconductor device to a level of UV radiation sufficient to deposit the non-erasable charge.
1. A method of protecting a charge trapping dielectric flash memory cell from UV-induced charging, comprising:
fabricating a charge trapping dielectric flash memory cell including a charge trapping dielectric charge storage layer in a semiconductor device; and
during processing steps subsequent to formation of the charge trapping dielectric charge storage layer, protecting the charge trapping dielectric flash memory cell from exposure to a level of UV radiation sufficient to deposit a non-erasable charge in the charge trapping dielectric flash memory cell.
2. The method of claim 1 , wherein the step of protecting is carried out by selecting processes in BEOL fabrication which do not include use, generation or exposure of the semiconductor device to a level of UV radiation sufficient to deposit the non-erasable charge.
3. The method of claim 2 , wherein the BEOL fabrication is carried out by selecting methods which do not include use of UV radiation as an activation or energy source.
4. The method of claim 2 , wherein the BEOL fabrication is carried out by methods which do not generate or result in exposure of the cell to UV radiation.
5. The method of claim 2 , wherein the BEOL fabrication is carried out by a non-plasma method.
6. The method of claim 1 , wherein the non-erasable charge is a charge which cannot be erased when a voltage sufficient to erase a bit of data written in the cell is applied to the charge trapping dielectric flash memory cell.
7. The method of claim 1 , further comprising depositing at least one layer comprising at least one low-K dielectric material over the charge trapping dielectric flash memory cell by a method which does not expose the charge trapping dielectric flash memory cell to a level of UV radiation sufficient to deposit a non-erasable charge in the charge trapping dielectric flash memory cell.
8. The method of claim 7 , wherein the at least one low-K dielectric material comprises parylene, polyimide, a fluoropolymer, a poly-arylene ether, SILK®, FLARE®, a porous silicate glass, an epoxy, SiCOH, benzocyclobutene (BCB), flowable oxide (FOX), 650-F, hydro polysilsesquioxane (H-PSSQ), methyl polysilsesquioxane (Me-PSSQ), phenyl polysilsesquioxane (Ph-PSSQ), and mixtures thereof.
9. The method of claim 1 , wherein the subsequent processing is BEOL processing.
10. The method of claim 1 , wherein the subsequent processing steps comprise formation of one or more of an interlayer dielectric layer, a cap layer and a top dielectric layer.
11. The method of claim 10 , wherein the subsequent processing steps are carried out by APCVD, CVD or a spin-on method.
12. A method of protecting a charge trapping dielectric flash memory cell from UV-induced charging, comprising:
fabricating a charge trapping dielectric flash memory cell including a charge trapping dielectric charge storage layer in a semiconductor device; and
during processing steps subsequent to formation of the charge trapping dielectric charge storage layer, protecting the charge trapping dielectric flash memory cell from exposure to a level of UV radiation sufficient to deposit a non-erasable charge in the charge trapping dielectric flash memory cell,
wherein the subsequent processing steps comprise deposition over the charge trapping dielectric flash memory cell of one or more of an interlayer dielectric layer, a cap layer and a top dielectric layer by APCVD, CVD or a spin-on method.
13. The method of claim 12 , wherein the BEOL fabrication is carried out by selecting methods which do not include use of UV radiation as an activation or energy source.
14. The method of claim 12 , wherein the BEOL fabrication is carried out by methods which do not generate or result in exposure of the cell to UV radiation.
15. The method of claim 12 , wherein the BEOL fabrication is carried out by a non-plasma method.
16. The method of claim 15 , wherein the at least one low-K dielectric material comprises parylene, polyimide, a fluoropolymer, a poly-arylene ether, SILK®, FLARE®, a porous silicate glass, an epoxy, SiCOH, benzocyclobutene (BCB), flowable oxide (FOX), 650-F, hydro polysilsesquioxane (H-PSSQ), methyl polysilsesquioxane (Me-PSSQ), phenyl polysilsesquioxane (Ph-PSSQ), and mixtures thereof.
17. The method of claim 12 , wherein at least one of the interlayer dielectric layer, cap layer or top dielectric layer comprises at least one low-K dielectric material deposited over the charge trapping dielectric flash memory cell by a non-plasma method.
18. The method of claim 12 , wherein the non-erasable charge is a charge which cannot be erased when a voltage sufficient to erase a bit of data written in the cell is applied to the charge trapping dielectric flash memory cell.
19. A method of protecting a charge trapping dielectric flash memory cell from UV-induced charging, comprising:
fabricating a charge trapping dielectric flash memory cell including a charge trapping dielectric charge storage layer in a semiconductor device; and
during processing steps subsequent to formation of the charge trapping dielectric charge storage layer, protecting the charge trapping dielectric flash memory cell from exposure to a level of UV radiation sufficient to deposit a non-erasable charge in the charge trapping dielectric flash memory cell, wherein the non-erasable charge is a charge which cannot be erased when a voltage sufficient to erase a bit of data written in the cell is applied to the charge trapping dielectric flash memory cell,
wherein the processing steps subsequent to formation of the charge trapping dielectric charge storage layer comprise deposition over the charge trapping dielectric flash memory cell of one or more of an interlayer dielectric layer, a cap layer and a top dielectric layer by APCVD, CVD or a spin-on method, and at least one of the interlayer dielectric layer, cap layer or top dielectric layer comprises at least one low-K dielectric material deposited over the charge trapping dielectric flash memory cell by a non-plasma method.
20. The method of claim 19 , wherein the at least one low-K dielectric material comprises parylene, polyimide, a fluoropolymer, a poly-arylene ether, SILK®, FLARE®, a porous silicate glass, an epoxy, SiCOH, benzocyclobutene (BCB), flowable oxide (FOX), 650-F, hydro polysilsesquioxane (H-PSSQ), methyl polysilsesquioxane (Me-PSSQ), phenyl polysilsesquioxane (Ph-PSSQ), and mixtures thereof.