Semiconductor device with stacked semiconductor elements
View Patent ↗In a semiconductor device 1 , a substrate 3 carries the first semiconductor element 2 a and the second semiconductor element 2 b . The first semiconductor element 2 a has a plurality of first pads 4 a and a plurality of second pads 4 b arrayed along two facing sides of a major surface. The second semiconductor element 2 b has a plurality of third pads 4 c along sides where the first pads 4 a and the second pads 4 b are arrayed, and a plurality of fourth pads 4 d along sides where the first pads 4 a and the second pads 4 b are not arrayed. First wirings 8 electrically connect the plurality of third pads 4 c to the plurality of fourth pads 4 d on the major surface. A plurality of electrodes 5 is arrayed along all the circumferential sides of the major surface of the substrate 3 . Second wirings 6 a electrically connect the plurality of first pads 4 a and the plurality of fourth pads 4 d respectively to the plurality of electrodes 5 . Third wirings 6 b electrically connect the plurality of second pads 4 b to the plurality of third pads 4 c.
1. A semiconductor device comprising:
a first semiconductor element having a plurality of first pads and a plurality of second pads arrayed along two facing sides of a major surface;
a second semiconductor element having a plurality of third pads along sides where the first pads and the second pads are arrayed, a plurality of fourth pads along sides proximate said two sides at which the first pads and the second pads are not arrayed and first wirings for electrically connecting the plurality of third pads to the plurality of fourth pads;
a substrate carrying the first semiconductor element and the second semiconductor element;
a plurality of electrodes arrayed along all the circumferential sides of the major surface of the substrate;
second wirings for electrically connecting the plurality of first pads and the plurality of fourth pads to the plurality of electrodes; and
third wirings for electrically connecting the plurality of second pads to the plurality of third pads.
2. The semiconductor device according to claim 1 , wherein the plurality of first pads and the plurality of second pads are arrayed in at least two rows along each of the two facing sides of the major surface of the first semiconductor element.
3. The semiconductor device according to claim 1 , wherein the first semiconductor element and the second semiconductor element are stacked one on top of another.