Method for fabricating dual-metal gate device
View Patent ↗A method of fabricating a MOS transistor that comprises a dual-metal gate that is formed from heterotypical metals. A gate dielectric ( 34 ), such as HfO 2 , is deposited on a semiconductor substrate. A sacrificial layer ( 35 ), is next deposited over the gate dielectric. The sacrificial layer is patterned so that the gate dielectric over a first (pMOS, for example) area ( 32 ) of the substrate is exposed and gate dielectric over a second (nMOS, for example) area ( 33 ) of the substrate continues to be protected by the sacrificial layer. A first gate conductor material ( 51 ) is deposited over the remaining sacrificial area and over the exposed gate dielectric. The first gate conductor material is patterned so that first gate conductor material over the second area of the substrate is etched away. The sacrificial layer over the second area prevents damage to the underlying dielectric material as the first gate conductor material is removed.
1. A method of fabricating a semiconductor device, the method comprising:
providing a semiconductor substrate having a surface and having a first area and a second area;
forming a gate dielectric on the surface over the first area and over the second area;
forming a sacrificial layer over the gate dielectric, wherein the sacrificial layer comprises silicon oxide;
patterning the sacrificial layer so that the gate dielectric over the first area is exposed and a remaining portion of the sacrificial layer protects the gate dielectric over the second area;
depositing a first metal gate conductor material over exposed gate dielectric and over the remaining portion of the sacrificial layer;
patterning the first metal gate conductor material so that the remaining portion of the sacrificial layer is exposed;
after patterning the first metal gate conductor material, removing the remaining portion of the sacrificial layer so as to expose the gate dielectric over the second area using a wet chemical etch; and
depositing a second metal gate conductor material over the patterned first metal gate conductor material and directly on the gate dielectric that was exposed over the second area as a result of removing the remaining sacrificial layer.
2. A method of fabricating a semiconductor device as defined in claim 1 , wherein the gate dielectric is a MeOx.
3. A method of fabricating a semiconductor device as defined in claim 2 , wherein the MeOx is selected from the group consisting of HfO 2 and oxides or oxynitrides of zirconium, hafnium, aluminum, lanthanum, strontium, titanium, silicon and combinations thereof.
4. A method of fabricating a semiconductor as defined in claim 1 , wherein the first metal gate conductor material is Ir.
5. A method of fabricating a semiconductor as defined in claim 1 , wherein the second metal gate conductor material is TaSiN.
6. A method of fabricating a semiconductor as defined in claim 5 , wherein the gate dielectric is a MeOx.
7. A method of fabricating a semiconductor as defined in claim 6 , wherein the gate dielectric is HfO 2 .
8. A method of fabricating a semiconductor as defined in claim 7 , wherein the first metal gate conductor material is Ir.
9. A method of fabricating a semiconductor device as defined in claim 1 , wherein:
i. the first area of the substrate accommodates the formation of a pMOS transistor;
ii. the first metal gate conductor material has a work function that approximates the valence band of silicon;
iii. the second area of the substrate accommodates the formation of an nMOS transistor; and
iv. the second metal gate conductor material has a work function that approximates the conduction band of silicon.
10. A method of fabricating a semiconductor device as defined in claim 9 , wherein the gate dielectric is HfO 2 .
11. A method of fabricating a semiconductor device, the method comprising:
providing a semiconductor substrate having a surface and having a first area and a second area;
forming a metal oxide gate dielectric on the surface over the first area and over the second area; and
protecting the metal oxide gate dielectric against a subsequent metal etch by:
imposing a first silicon oxide sacrificial layer directly on die metal oxide gate dielectric over the second area while providing an exposed portion of the metal oxide gate dielectric over the first area;
depositing a first metal directly on the exposed portion of the metal oxide gate dielectric over the first area and over the first silicon oxide sacrificial layer;
etching away the first metal over the second area using a dry etch;
etching away the first silicon oxide sacrificial layer using a wet chemical etch; and
depositing a second metal directly on the exposed portion of the metal oxide gate dielectric over the second area.