IP Library Granted Patent US 6,970,007
Granted Patent B2
US 6,970,007 · App. 10/404,081 · Granted Nov 29, 2005

Semiconductor device low temperature test apparatus using electronic cooling element

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Quick Facts
Patent No.
US 6,970,007
App. No.
10/404,081
Granted
Nov 29, 2005
Kind
B2
Abstract

A semiconductor device test apparatus, has: a socket, which connects to a semiconductor device undergoing testing mounted thereon; a test tray, which houses the semiconductor device undergoing testing and which is provided, in a position on which the semiconductor device undergoing testing is mounted, with a first electronic cooling element that absorbs heat via one surface thereof and releases heat via the other surface thereof; and a contact block, which is provided with a second electronic cooling element that makes contact with the top of the semiconductor device undergoing testing in a state in which the semiconductor device undergoing testing is mounted on the socket.

Claims (12)

1. A semiconductor device test apparatus, comprising:

a socket, which connects to a semiconductor device undergoing testing that is mounted on the socket; and

a test tray, which houses the semiconductor device undergoing testing and which is provided, in a position on which the semiconductor device undergoing testing is mounted, with a first electronic cooling element that absorbs heat via one surface thereof and releases heat via the other surface thereof,

wherein the semiconductor device undergoing testing is housed in the test tray and the bottom side of the semiconductor device undergoing testing is pre-cooled by the first electronic cooling element; the test tray is mounted on the socket and a test is implemented while cooling a bottom side of the semiconductor device undergoing testing, which is mounted on the socket, by the first electronic cooling element; and, after completion of the test, the semiconductor device undergoing testing is heated by the first electronic cooling element of the test tray.

2. The semiconductor device test apparatus according to claim 1 , further comprising:

a contact block, which causes a second electronic cooling element to make contact with a top side of the semiconductor device undergoing testing in a state in which the semiconductor device undergoing testing is mounted on the socket,

wherein, at the time of implementing the test, the top side of the semiconductor device undergoing testing is cooled by the second electronic cooling element.

3. The semiconductor device test apparatus according to claim 2 , wherein the first and/or second electronic cooling element(s) comprise(s) a heat-absorbing surface and a heat-releasing surface, and the heat-absorbing surface and heat-releasing surface can be switched by switching a current direction therein.

4. The semiconductor device test apparatus according to claim 2 , wherein the first and/or second electronic cooling element(s) is (are) a Peltier element.

5. The semiconductor device test apparatus according to claim 3 , wherein, while the test is being implemented, the surface of the first electronic cooling element which corresponds to the socket assumes a heat-releasing state.

6. The semiconductor device test apparatus according to claim 1 , wherein the test tray comprises housing portions for housing a plurality of semiconductor devices undergoing testing, and the first electronic cooling elements are provided in the housing portions and in the positions in which the semiconductor devices undergoing testing are mounted.

7. The semiconductor device test apparatus according to claim 1 , further comprising a tester unit to which the socket is connected.

Assignments (8)
CORRECTIVE ASSIGNMENT TO CORRECT THE 8647899 PREVIOUSLY RECORDED ON REEL 035240 FRAME 0429. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTERST. Recorded Nov 3, 2020
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 058002/0470 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 14, 2016
From: CYPRESS SEMICONDUCTOR CORPORATION
To: MONTEREY RESEARCH, LLC
Reel/Frame 040911/0238 →
PARTIAL RELEASE OF SECURITY INTEREST IN PATENTS Recorded Aug 11, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
Reel/Frame 039708/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 30, 2015
From: SPANSION, LLC
To: CYPRESS SEMICONDUCTOR CORPORATION
Reel/Frame 036037/0716 →
SECURITY INTEREST Recorded Mar 21, 2015
From: CYPRESS SEMICONDUCTOR CORPORATION; SPANSION LLC
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 035240/0429 →
RELEASE OF SECURITY INTEREST Recorded Mar 13, 2015
From: BARCLAYS BANK PLC
To: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY LLC
Reel/Frame 035201/0159 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 11, 2012
From: SPANSION INC.
To: SPANSION LLC
Reel/Frame 029112/0198 →
SECURITY AGREEMENT Recorded Jun 4, 2010
From: SPANSION LLC; SPANSION INC.; SPANSION TECHNOLOGY INC.; SPANSION TECHNOLOGY LLC
To: BARCLAYS BANK PLC
Reel/Frame 024522/0338 →