System and method for reference-modeling a processor

1. A system for reference-modeling a processor design, comprising:

an architecture database that contains specifications regarding said processor design that include: instruction set specifications, architectural resource specifications, pipeline specifications and connectivity specifications;

a simulation subsystem that draws selected portions of said specifications to simulate and test said processor design; and

a documentation subsystem that draws other selected portions of said specifications to document and register-model said processor design, wherein changes to said documented specifications are propagated to said architecture database.

2. The system as recited in claim 1 further comprising a performance analysis subsystem that draws further selected portions of said specifications to analyze a performance of said processor design.

3. The system as recited in claim 1 further comprising an assembler/compiler subsystem that draws further selected portions of said specifications to produce an assembler/compiler for said processor design.

4. The system as recited in claim 1 wherein said simulation subsystem comprises a reference test suite section that draws selected portions of said specifications to produce a reference test suite for said processor design.

5. The system as recited in claim 1 wherein said instruction set specifications include specifications selected from the group consisting of:

instruction format,

field format,

opcodes, and

operands.

6. The system as recited in claim 1 wherein said architectural resource specifications include specifications selected from the group consisting of:

resource format,

function unit resources,

register resources, and

memory resources.

7. The system as recited in claim 1 wherein said pipeline specifications include specifications selected from the group consisting of:

pipeline format, and

stage description.

8. A method of reference-modeling a processor design, comprising:

storing specifications regarding said processor design in an architecture database, said specifications including: instruction set specifications, architectural resource specifications, pipeline specifications and connectivity specifications;

drawing selected portions of said specifications to simulate and test said processor design; and

drawing other selected portions of said specifications to document and register-model said processor design, wherein changes to said specifications are propagated to said architecture database.

9. The method as recited in claim 8 further comprising drawing further selected portions of said specifications to analyze a performance of said processor design.

10. The method as recited in claim 8 further comprising drawing further selected portions of said specifications to produce an assembler/compiler for said processor design.

11. The method as recited in claim 8 wherein drawing selected portions of said specifications comprises producing a reference test suite for said processor design.

12. The method as recited in claim 8 wherein said instruction set specifications include specifications selected from the group consisting of:

instruction format,

field format,

opcodes, and

operands.

13. The method as recited in claim 8 wherein said architectural resource specifications include specifications selected from the group consisting of:

resource format,

function unit resources,

register resources, and

memory resources.

14. The method as recited in claim 8 wherein said pipeline specifications include specifications selected from the group consisting of:

pipeline format, and

stage description.

15. A system for reference-modeling a processor design, comprising:

an architecture database that contains specifications regarding said processor design that include: instruction set specifications, architectural resource specifications, pipeline specifications and connectivity specifications;

a simulation subsystem that draws selected portions of said specifications to simulate and test said processor design;

a documentation subsystem that draws other selected portions of said specifications to document and register-model said processor design, wherein changes to said documented specifications are propagated to said architecture database; and

a performance analysis subsystem that draws further selected portions of said specifications to analyze a performance of said processor design and instigate changes in said specifications thereby to change said performance.

16. The system as recited in claim 15 further comprising an assembler/compiler subsystem that draws further selected portions of said specifications to produce an assembler/compiler for said processor design.

17. The system as recited in claim 15 wherein said simulation subsystem comprises a reference test suite section that draws selected portions of said specifications to produce a reference test suite for said processor design.

18. The system as recited in claim 15 wherein said instruction set specifications include specifications selected from the group consisting of:

instruction format,

field format,

opcodes, and

operands.

19. The system as recited in claim 15 wherein said architectural resource specifications include specifications selected from the group consisting of:

resource format,

function unit resources,

register resources, and

memory resources.

20. The system as recited in claim 15 wherein said pipeline specifications include specifications selected from the group consisting of:

pipeline format, and

stage description.