Self-aligned, low-resistance, efficient MRAM read/write conductors
The present invention seeks to reduce the amount of current required for a write operation by using a process for forming the read conductor within a recessed write conductor, the write conductor itself formed within a trench of an insulating layer. The present invention protects the MTJ from the voltages created by the write conductor by isolating the write conductor and enabling the reduction of current necessary to write a bit of information.
1. A method of forming at least one magnetoresistive random access memory cell structure, the method comprising:
forming a trench in a first insulating layer to define a first upper level and a second lower level, said first level and said second level being connected by at least a sidewall region;
forming a ferromagnetic cladding layer within said trench and over said second level and said sidewall region of said first insulating layer;
forming a first conductive layer within said trench and over a second level and a sidewall region of said ferromagnetic cladding layer;
forming a second insulating layer within said trench and over a second level and a sidewall region of said first conductive layer;
forming a second conductive layer within said trench; and
forming a magnetic tunnel junction element over said second conductive layer.
2. The method of claim 1 further comprising said first insulating layer formed over a substrate, said substrate being formed of a material selected from the group consisting of silicon, silicon-on-insulator, silicon-on-sapphire, silicon-germanium, germanium, or gallium arsenide.
3. The method of claim 1 , wherein said first conductive layer is a write conductor, and said second conductive layer is a read conductor.
4. The method of claim 1 , wherein said first insulating layer is formed of a material selected from the group consisting of silicon oxide, silicon dioxide, aluminum oxide, and tetraethylorthosilicate.
5. The method of claim 1 , wherein said ferromagnetic cladding layer is formed of a material selected from the group consisting of nickel-iron, cobalt-iron, cobalt-nickel-iron, iron, nickel, and cobalt.
6. The method of claim 1 , wherein said first conductive layer is formed of a material selected from the group consisting of tungsten, platinum, gold, silver, aluminum, and copper.
7. The method of claim 1 , wherein said second conductive layer is formed of a material selected from the group consisting of tungsten, platinum, gold, silver, aluminum, tantalum, and copper.
8. The method of claim 1 , wherein said second insulating layer is formed of a material selected form the group consisting of silicon nitride, alumina oxides, and oxides.
9. The method of claim 1 , wherein said second insulating layer is formed of a high temperature polymer.
10. The method of claim 1 , wherein said second insulating layer is formed of a dielectric material.
11. The method of claim 1 , wherein said act of forming a trench is performed by reactive ion etching.
12. The method of claim 1 further comprising planarizing said second conductive layer, such that a topmost surface of said second conductive layer is planar to a topmost surface of said first conductive layer.
13. The method of claim 12 further comprising planarizing said second conductive layer, such that said topmost surface of said second conductive layer, and said topmost surface of said first conductive layer are planar to a topmost surface of said first insulating layer.
14. The method of claim 1 further comprising planarizing said first insulating layer, said ferromagnetic cladding layer, and said first conductive layer such that topmost surfaces of each layer are planar to a topmost surface of said second conductive layer.
15. The method of claim 1 further comprising forming a liner between said first insulating layer and said ferromagnetic cladding layer.
16. The method of claim 15 , wherein said liner is formed of a material selected from the group consisting of tantalum, titanium, titanium-tungsten, titanium nitride, tungsten-nitride and chromium.
17. The method of claim 1 further comprising forming a barrier layer between said ferromagnetic cladding layer and said first conductive layer.
18. The method of claim 17 , wherein said barrier layer is formed of an oxide.
19. The method of claim 17 , wherein said barrier layer is formed of a low pressure chemical vapor deposition oxide.
20. The method of claim 17 , wherein said barrier layer is formed of a nitride.
21. The method of claim 17 , wherein said barrier layer is formed of a low pressure or high pressure tetraethylorthosilicate.
22. The method of claim 17 , wherein said barrier layer is formed of boro-phosopho-silicate glass.
23. The method of claim 1 further comprising forming a liner between said ferromagnetic cladding layer and said first conductive layer.
24. The method of claim 1 , wherein said magnetic tunnel junction element comprises:
a pinned magnetic layer;
a tunnel barrier layer; and
a free magnetic layer.
25. The method of claim 1 further comprising forming a plurality of said magnetoresistive random access memory cell structures.
26. A method of forming at least one magnetoresistive random access memory cell structure, the method comprising:
forming a trench in a first insulating layer to define a first upper level and a second lower level, said first level and said second level being connected by at least a sidewall region;
forming a ferromagnetic cladding layer within said trench and over said second level and said sidewall region of said first insulating layer;
forming a first conductive layer within said trench and over a second level and a sidewall region of said ferromagnetic cladding layer;
forming a second insulating layer within said trench and over a second level and a sidewall region of said first conductive layer;
forming a third insulating layer over said first upper level of said first insulating layer, and within said trench and over a second level and a sidewall region of said second insulating layer;
forming a second conductive layer within said trench; and
forming a magnetic tunnel junction element over said second conductive layer.
27. The method of claim 26 further comprising said first insulating layer formed over a substrate, said substrate being formed of a material selected from the group consisting of silicon, silicon-on-insulator, silicon-on-sapphire, silicon-germanium, germanium, or gallium arsenide.
28. The method of claim 26 , wherein said first conductive layer is a write conductor, and said second conductive layer is a read conductor.
29. The method of claim 26 , wherein said first insulating layer is formed of a material selected from the group consisting of silicon oxide, silicon dioxide, aluminum oxide, and tetraethylorthosilicate.
30. The method of claim 26 , wherein said ferromagnetic cladding layer is formed of a material selected from the group consisting of nickel-iron, cobalt-iron, cobalt-nickel-iron, iron, nickel, and cobalt.
31. The method of claim 26 , wherein said first conductive layer is formed of a material selected from the group consisting of tungsten, platinum, gold, silver, aluminum, and copper.
32. The method of claim 26 , wherein said second conductive layer is formed of a material selected from the group consisting of tungsten, platinum, gold, silver, aluminum, tantalum, and copper.
33. The method of claim 26 , wherein said third insulating layer is formed of a material selected form the group consisting of silicon nitride and oxides.
34. The method of claim 26 , wherein said third insulating layer is formed of a high temperature polymer.
35. The method of claim 26 , wherein said third insulating layer is formed of a dielectric material.
36. The method of claim 26 , wherein said act of forming a trench is performed by reactive ion etching.
37. The method of claim 26 further comprising planarizing said second conductive layer, such that a topmost surface of said second conductive layer is planar to a topmost surface of said third insulating layer.
38. The method of claim 26 further comprising planarizing said third insulating layer such that a topmost surface of said third insulating layer is planar to a topmost surface of said second conductive layer.
39. The method of claim 26 further comprising forming a liner between said first insulating layer and said ferromagnetic cladding layer.
40. The method of claim 39 , wherein said liner is formed of a material selected from the group consisting of tantalum, titanium, titanium-tungsten, titanium nitride, and chromium.
41. The method of claim 26 further comprising forming a barrier layer between said ferromagnetic cladding layer and said first conductive layer.
42. The method of claim 41 , wherein said barrier layer is formed of an oxide.
43. The method of claim 41 , wherein said barrier layer is formed of a low pressure chemical vapor deposition oxide.
44. The method of claim 41 , wherein said barrier layer is formed of a nitride.
45. The method of claim 41 , wherein said barrier layer is formed of a low pressure or high pressure tetraethylorthosilicate.
46. The method of claim 41 , wherein said barrier layer is formed of boro-phosopho-silicate glass.
47. The method of claim 26 , wherein said magnetic tunnel junction element comprises:
a pinned magnetic layer;
a tunnel barrier layer; and
a free magnetic layer.
48. At least one magnetoresistive random access memory cell structure, comprising:
a trench in a first insulating layer defining a first upper level and a second lower level, said first level and said second level being connected by at least a sidewall region;
a ferromagnetic cladding layer formed within said trench and over said second level and said sidewall region of said first insulating layer;
a first conductive layer formed within said trench and over a second level and a sidewall region of said ferromagnetic cladding layer;
a second insulating layer formed within said trench and over a second level and a sidewall region of said first conductive layer;
a second conductive layer formed within said trench; and
a magnetic tunnel junction element formed over said second conductive layer.
49. The cell structure of claim 48 further comprising said first insulating layer formed over a substrate, said substrate being formed of a material selected from the group consisting of silicon, silicon-on-insulator, silicon-on-sapphire, silicon-germanium, germanium, or gallium arsenide.
50. The cell structure of claim 48 , wherein said first conductive layer is a write conductor, and said second conductive layer is a read conductor.
51. The cell structure of claim 48 , wherein said first insulating layer is formed of a material selected from the group consisting of silicon oxide, silicon dioxide, aluminum oxide, and tetraethylorthosilicate.
52. The cell structure of claim 48 , wherein said ferromagnetic cladding layer is formed of a material selected from the group consisting of nickel-iron, cobalt-iron, cobalt-nickel-iron, iron, nickel, and cobalt.
53. The cell structure of claim 48 , wherein said first conductive layer is formed of a material selected from the group consisting of tungsten-nitride, tungsten, platinum, gold, silver, aluminum, and copper.
54. The cell structure of claim 48 , wherein said second conductive layer is formed of a material selected from the group consisting of tungsten, platinum, gold, silver, aluminum, tantalum, and copper.
55. The cell structure of claim 48 , wherein said second insulating layer is formed of a material selected from the group consisting of silicon nitride and oxides.
56. The cell structure of claim 48 , wherein said second insulating layer is formed of a high temperature polymer.
57. The cell structure of claim 48 , wherein said second insulating layer is formed of a dielectric material.
58. The cell structure of claim 48 , wherein a topmost surface of said second conductive layer is planar to a topmost surface of said first conductive layer.
59. The cell structure of claim 58 , wherein said topmost surface of said second conductive layer, and said topmost surface of said first conductive layer are planar to a topmost surface of said first insulating layer.
60. The cell structure of claim 48 further comprising a liner formed between said first insulating layer and said ferromagnetic cladding layer.
61. The cell structure of claim 60 , wherein said liner is formed of a material selected from the group consisting of tantalum, titanium, titanium-tungsten, titanium nitride, tungsten-nitride, and chromium.
62. The cell structure of claim 48 further comprising a barrier layer formed between said ferromagnetic cladding layer and said first conductive layer.
63. The cell structure of claim 62 , wherein said barrier layer is formed of an oxide.
64. The cell structure of claim 62 , wherein said barrier layer is formed of a low pressure chemical vapor deposition oxide.
65. The cell structure of claim 62 , wherein said barrier layer is formed of a nitride.
66. The cell structure of claim 62 , wherein said barrier layer is formed of a low pressure or high pressure tetraethylorthosilicate.
67. The cell structure of claim 62 , wherein said barrier layer is formed of boro-phosopho-silicate glass.
68. The cell structure of claim 48 further comprising a liner formed between said ferromagnetic cladding layer and said first conductive layer.
69. The cell structure of claim 48 , wherein said magnetic tunnel junction element comprises:
a pinned magnetic layer;
a tunnel barrier layer; and
a free magnetic layer.
70. At least one magnetoresistive random access memory cell structure, comprising:
a trench in a first insulating layer defining a first upper level and a second lower level, said first level and said second level being connected by at least a sidewall region;
a ferromagnetic cladding layer formed within said trench and over said second level and said sidewall region of said first insulating layer;
a first conductive layer formed within said trench and over a second level and a sidewall region of said ferromagnetic cladding layer;
a second insulating layer formed within said trench and over a second level and a sidewall region of said first conductive layer;
a third insulating layer formed over said first upper level of said first insulating layer, and within said trench and over a second lower level and a sidewall region of said second insulating layer;
a second conductive layer formed within said trench; and
a magnetic tunnel junction element formed over said second conductive layer.
71. The cell structure of claim 70 further comprising said first insulating layer formed over a substrate, said substrate being formed of a material selected from the group consisting of silicon, silicon-on-insulator, silicon-on-sapphire, silicon-germanium, germanium, or gallium arsenide.
72. The cell structure of claim 70 , wherein said first conductive layer is a write conductor, and said second conductive layer is a read conductor.
73. The cell structure of claim 70 , wherein said first insulating layer is formed of a material selected from the group consisting of silicon oxide, silicon dioxide, aluminum oxide, and tetraethylorthosilicate.
74. The cell structure of claim 70 , wherein said ferromagnetic cladding layer is formed of a material selected from the group consisting of nickel-iron, cobalt-iron, cobalt-nickel-iron, iron, nickel, and cobalt.
75. The cell structure of claim 70 , wherein said first conductive layer is formed of a material selected from the group consisting of tungsten, platinum, gold, silver, aluminum, and copper.
76. The cell structure of claim 70 , wherein said second conductive layer is formed of a material selected from the group consisting of tungsten, platinum, gold, silver, aluminum, tantalum, and copper.
77. The cell structure of claim 70 , wherein said third insulating layer is formed of a material selected form the group consisting of silicon nitride and oxides.
78. The cell structure of claim 70 , wherein said third insulating layer is formed of a high temperature polymer.
79. The cell structure of claim 70 , wherein said third insulating layer is formed of a dielectric material.
80. The cell structure of claim 70 , wherein said topmost surface of said second conductive layer is planar to a topmost surface of said third insulating layer.
81. The cell structure of claim 70 further comprising a liner formed between said first insulating layer and said ferromagnetic cladding layer.
82. The cell structure of claim 81 , wherein said liner is formed of a material selected from the group consisting of tantalum, titanium, titanium-tungsten, titanium nitride, tungsten-nitride, and chromium.
83. The cell structure of claim 70 further comprising a barrier layer formed between said ferromagnetic cladding layer and said first conductive layer.
84. The cell structure of claim 83 , wherein said barrier layer is formed of an oxide.
85. The cell structure of claim 83 , wherein said barrier layer is formed of a low pressure chemical vapor deposition oxide.
86. The cell structure of claim 83 , wherein said barrier layer is formed of a nitride.
87. The cell structure of claim 83 , wherein said barrier layer is formed of a low pressure or high pressure tetraethylorthosilicate.
88. The cell structure of claim 83 , wherein said barrier layer is formed of boro-phosopho-silicate glass.
89. The cell structure of claim 70 , wherein said magnetic tunnel junction element comprises:
a pinned magnetic layer;
a tunnel barrier layer; and
a free magnetic layer.
90. A processor system, comprising:
a processor; and
a memory array comprising:
a plurality of trenches formed in a first insulating layer, each of said plurality of trenches defining a first upper level and a second lower level, said first level and second level being connected by at least a sidewall region;
a ferromagnetic cladding layer formed within a trench and over said second level and said sidewall region of said first insulating layer;
a first conductive layer formed within said trench and over a second level and a sidewall region of said ferromagnetic cladding layer;
a second insulating layer formed within said trench and over a second level and a sidewall region of said first conductive layer;
a third insulating layer formed over said first upper level of said first insulating layer, and within said trench and over a second lower level and a sidewall region of said second insulating layer;
a second conductive layer formed within said trench;
a magnetic tunnel junction element formed over said second conductive layer, such that a plurality of magnetic tunnel junctions form rows; and
an interconnect line disposed above each of said plurality of magnetic tunnel junction elements.
91. The processor system of claim 90 , wherein a topmost surface of said second conductive layer is planar to a topmost surface of said third insulating layer.
92. The processor system of claim 90 further comprising a liner formed between said first insulating layer and said ferromagnetic cladding layer.
93. The processor system of claim 90 further comprising a barrier layer formed between said ferromagnetic cladding layer and said first conductive layer.
94. The processor system of claim 90 further comprising a liner formed between said ferromagnetic cladding layer and said first conductive layer.
95. The processor system of claim 90 , wherein said magnetic tunnel junction element further comprises:
a pinned magnetic layer;
a tunnel barrier layer; and
a free magnetic layer.