Method and apparatus for efficient semiconductor process evaluation

1. A method, comprising:

executing a first continuous software process that includes:

automatically generating a first physical behavior curve from a first process description, said first process description describing a first process;

automatically generating a first device model for said first process from said first physical behavior curve, said first device model represented in geometric form;

automatically generating, with said first device model and with a first geometric optimization sequence, a first circuit design for said first process;

determining if said first circuit design meets one or more functional characteristics:

executing a second continuous software process that includes:

automatically generating a second physical behavior curve from a second process description, said second process description describing a second process;

automatically generating a second device model from said second physical behavior curve, said second device model for said second process, said second device model represented in geometric form;

automatically generating, with said second device model and with a second geometric optimization sequence, a second circuit design, said second circuit design for said second process; and

determining if said second circuit design meets one or more functional characteristics.

2. The method of claim 1 further comprising analyzing said first circuit design.

3. The method of claim 1 further comprising determining a change to said first process, said second process description describing said first process altered by said change.

4. The method of claim 1 further comprising fetching said second process description from a database prior to said automatic generating of said second physical behavior curve.

5. The method of claim 1 wherein said determining if said first circuit design meets one or more functional characteristics further comprises automatically generating, with said first device model and with a plurality of geometric optimization sequences, a plurality of circuit designs for said first process, and determining if said plurality of circuit designs meets one or more functional characteristics.

6. The method of claim 5 wherein said plurality of circuit designs are from a design library.

7. The method of claim 5 wherein said determining if said second circuit design meets one or more functional characteristics further comprises automatically generating, with said second device model and with a second plurality of geometric optimization sequences, a plurality of circuit designs for said second process, and determining if said plurality of circuit designs meets one or more functional characteristics.

8. The method of claim 7 wherein said plurality of circuit designs for said first process and said plurality of designs for said second process are from the same design library.

9. The method of claim 1 further comprising measuring another physical behavior curve for said second process from a wafer fabricated according to said second process.

10. The method of claim 9 further comprising:

automatically generating another device model for said second process from said another physical behavior curve, said another device model represented in geometric form;

automatically generating, with said another device model and with another geometric optimization sequence, another circuit design for said second process; and

determining if said circuit design meets one or more functional characteristics.

11. The method of claim 1 wherein said first device model further comprises a posynomial equation.

12. The method of claim 1 wherein said second device model further comprises a monomial equation.

13. A method, comprising:

executing a first continuous software process that includes a1), b1) and c1) below:

a1) automatically generating a first physical behavior curve from a first process description, said first process description describing a first process;

b1) automatically generating a first device model for said first process from said first physical behavior curve, said first device model represented in geometric form;

c1) automatically generating, with said first device model and with a geometric optimization sequence, a first circuit design for said first process;

d1) determining if said first circuit design meets one or more functional characteristics;

articulating a process change for said first process;

generating a second process description, said second process description describing a second process, said second process corresponding to said first process altered by said change;

executing a second continuous software process that includes a2), b2) and c2) below:

a2) automatically generating a second physical behavior curve from said second process description;

b2) automatically generating a second device model from said second physical behavior curve, said second device model for said second process, said second device model represented in geometric form; and

c2) automatically generating, with said second device model and with a second geometric optimization sequence, a second circuit design, said second circuit design for said second process;

d2) determining if said second circuit design meets one or more functional characteristics.

14. The method of claim 13 wherein said first circuit could not meet one or more functional characteristics.

15. The method of claim 14 wherein said process change is to cause a solution to be found by said second geometric optimization sequence.

16. The method of claim 13 further comprising analyzing said first circuit design prior to said articulating.

17. The method of claim 16 wherein said analyzing further comprises simulating the operation of said first circuit design.

18. The method of claim 13 wherein said determining if said first circuit design meets one or more functional characteristics further comprises automatically generating, with said first device model and with a plurality of geometric optimization sequences, a plurality of circuit designs for said first process, and determining if said plurality of circuit designs meet one or more functional characteristics.

19. The method of claim 18 wherein said determining if said second circuit design meets one or more functional characteristics further comprises automatically generating, with said second device model and with a second plurality of geometric optimization sequences, a plurality of circuit designs for said second process, and determining if said plurality of circuit designs meet one or more functional characteristics.

20. The method of claim 13 further comprising measuring another physical behavior curve for said second process from a wafer fabricated according to said second process.

21. The method of claim 20 further comprising:

automatically generating another device model for said second process from said another physical behavior curve, said another device model represented in geometric form; and

automatically generating, with said another device model and with another geometric optimization sequence, another circuit design for said second process; and

determining if said circuit design meets one or more functional characteristics.

22. A method, comprising:

executing a continuous software process that includes:

automatically generating a first physical behavior curve from a first process description, said first process description describing a first process;

automatically generating a first device model for said first process from said first physical behavior curve, said first device model represented in geometric form;

automatically generating, with said first device model and with a plurality geometric optimization sequences, a first plurality of circuit designs for said first process;

determining if said first plurality circuit design meets one or more functional characteristics;

fetching a second process description, said second process description describing a second process;

automatically generating a second physical behavior curve from said second process description;

automatically generating a second device model from said second physical behavior curve, said second device model for said second process, said second device model represented in geometric form; and

automatically generating, with said second device model and with a second plurality of geometric optimization sequences, a second plurality of circuit designs, said second plurality of circuit designs for said second process; and

determining if said second plurality of circuit design meets one or more functional characteristics.

23. The method of claim 22 wherein said fetching a second process description further comprises fetching said second process description from a database.

24. The method of claim 22 wherein said first process is a first manufacturer's process and said second process is a second manufacturer's process.

25. The method of claim 24 further comprising analyzing said first plurality of circuit designs and said second plurality of circuit designs to compare said first manufacturer's process to said second manufacturer's process.

26. The method of claim 22 wherein said second plurality of circuit designs are of the same type as those of said first plurality of circuit designs.

27. The method of claim 22 wherein said second plurality of circuit designs are of the same types as those of said first plurality of circuit designs.

28. The method of claim 22 further comprising measuring another physical behavior curve for said second process from a wafer fabricated according to said second process.

29. The method of claim 28 further comprising:

automatically generating another device model for said second process from said another physical behavior curve, said another device model represented in geometric form; and

automatically generating, with said another device model and with another geometric optimization sequence, another circuit design for said second process; and

determining if said circuit design meets one or more functional characteristics.

30. A method, comprising:

executing a continuous software process that includes:

automatically generating a physical behavior curve from a process description, said process description describing a process;

automatically generating a device model for said process from said physical behavior curve, said device model represented in geometric form;

automatically generating, with said device model and with a geometric optimization sequence, a circuit design for said process; and

determining if said circuit design meets one or more functional characteristics.