Heterobipolar transistor and method of fabricating the same
The present invention realizes a heterobipolar transistor using a SiGeC base layer in order to improve its electric characteristics. Specifically, the distribution of carbon and boron within the base layer is controlled so that the concentration of boron is higher than the concentration of carbon on the side bordering on the emitter layer, and upon the formation of the emitter layer, both boron and carbon are dispersed into a portion of the emitter layer that comes into contact with the base layer.
1. A heterobipolar transistor comprising:
an n-type silicon collector layer;
a base layer formed on said n-type silicon collector layer and made of a p-type SiGeC mixed crystal layer doped with boron; and
an n-type silicon emitter layer formed on the base layer and containing boron at a concentration exceeding 7×10 17 cm −3 ;
wherein at least a portion of said base layer including a boundary with said emitter layer has a higher concentration of boron than a concentration of carbon.
2. The heterobipolar transistor as claimed in claim 1 , further comprising:
a cap layer formed between said base layer and said emitter layer and made of silicon doped with boron;
wherein said cap layer contains an n-type dopant impurity at a concentration exceeding the concentration of the boron.
3. The heterobipolar transistor as claimed in claim 1 , wherein said emitter layer contains carbon.
4. The heterobipolar transistor as claimed in claim 1 , wherein said emitter layer is doped with phosphorous.
5. The heterobipolar transistor as claimed in claim 1 , wherein said collector layer has a higher concentration of carbon than a concentration of boron in a region including a border with said base layer.
6. The heterobipolar transistor as claimed in claim 1 , wherein said emitter layer substantially contains no germanium.
7. The heterobipolar transistor as claimed in claim 1 , wherein said base layer has a first region on the emitter layer side in which a germanium concentration gradient exists, indicating a gradual decrease in the germanium concentration in a direction from said collector layer side to said emitter layer side.
8. The heterobipolar transistor as claimed in claim 7 , wherein the germanium concentration gradient in said first region is virtually linear.
9. The heterobipolar transistor as claimed in claim 7 , wherein the germanium concentration at the boundary of said base layer on said emitter layer side is 5% or below.
10. The heterobipolar transistor as claimed in claim 9 , wherein the germanium concentration at the boundary of said base layer on said emitter layer side is 1% or below.
11. The heterobipolar transistor as claimed in claim 9 , wherein the germanium concentration at the boundary of said base layer on said emitter layer side is substantially 0%.
12. The heterobipolar transistor as claimed in claim 1 , wherein said base layer has a region in which the concentration of boron is within a range of 2×10 19 –8×10 19 cm −3 and a region at least on the collector layer side in which the concentration of carbon is within a range of 7×10 19 –9×10 19 cm −3 .
13. The heterobipolar transistor as claimed in claim 1 , wherein said base layer has a second region on said collector layer side in which a germanium concentration gradient exists, indicating a gradual increase in the Ge concentration in a direction from said collector layer side to said emitter layer side.
14. The heterobipolar transistor as claimed in claim 13 , wherein said second region has a thickness of 16 nm or below.
15. The heterobipolar transistor as claimed in claim 13 , wherein a distance between said second region and a region in which the concentration of boron is 1×10 19 cm −3 or above in said base layer is 15 nm or below.
16. The heterobipolar transistor as claimed in claim 1 , wherein said collector layer includes a silicon layer that is epitaxially grown on a substrate.
17. A heterobipolar transistor fabrication method comprising steps of:
forming an n-type collector layer by forming a first n-type silicon layer on a substrate;
forming a p-type base layer by depositing a SiGeC mixed crystal layer containing boron on said n-type collector layer so that the concentration of carbon exceeds the concentration of boron, and then continuing to deposit said SiGeC mixed crystal layer so that the concentration of boron exceeds the concentration of carbon; and
forming an emitter layer by depositing a second n-type silicon layer on said p-type base layer.
18. The heterobipolar transistor fabrication method as claimed in claim 17 , wherein said step of forming said p-type base layer further comprises a step of depositing a SiGe mixed crystal layer after the deposition of said SiGeC mixed crystal layer for realizing a higher concentration of boron compared with the concentration of carbon.
19. The heterobipolar transistor fabrication method as claimed in claim 17 , wherein said step of forming said p-type base layer further comprises a step of depositing another SiGeC mixed crystal layer on said n-type collector layer before the deposition of said SiGeC mixed crystal layer for realizing a higher concentration of carbon compared with the concentration of boron.
20. The heterobipolar transistor fabrication method as claimed in claim 17 , wherein said step of forming said p-type base layer includes forming a germanium concentration gradient in a region including a boundary on said emitter layer side, indicating a gradual decrease in the germanium concentration in a direction from said n-type collector layer side to said emitter layer side.
21. The heterobipolar transistor fabrication method as claimed in claim 17 , wherein said step of forming said p-type base layer includes forming another germanium concentration gradient in a region including a boundary on said n-type collector layer side, indicating a gradual increase in the germanium concentration in a direction from said n-type collector layer side to said emitter layer side.
22. The heterobipolar transistor fabrication method as claimed in claim 17 , wherein said step of forming said emitter layer further comprises a step of depositing said second n-type silicon layer directly onto said p-type base layer.
23. The heterobipolar transistor fabrication method as claimed in claim 17 , further comprising a step of forming a cap layer made up of silicon containing boron, said step being executed after the step of forming said p-type base layer and before the step of forming said emitter layer.
24. The heterobipolar transistor fabrication method as claimed in claim 17 , wherein the steps of forming said first n-type silicon layer, depositing said SiGeC mixed crystal layer, and depositing said second n-type silicon layer are performed using a low-pressure CVD technique.