Inverted isolation formed with spacers
View Patent ↗A method of forming a semiconductor device so as to provide the device inverted isolation trenches with convex sidewalls. Initially, a plurality of composite isolation posts ( 50, 51 ) are formed on a substrate ( 40 ) through successive deposition, lithography, and etching steps. The posts comprise a bottom layer ( 501, 502 ) of silicon dioxide and an overlying etch-stop layer of silicon nitride ( 502, 512 ). An insulating material ( 60 ) is then deposited over the isolation posts and areas of the substrate. Isolation structures ( 70,71 ) are established by etching the insulating material to form convex sidewall spacers ( 701,702, 711, 712 ) at the vertical walls of the isolation posts. Active areas ( 80 ) between spacers are filled with semiconductor material. In an embodiment, a strained cap layer ( 101 ) may be imposed on the active areas. The strained cap layer has a lattice constant that is different from the lattice constant of the semiconductor material.
1. A semiconductor device fabricated in accordance with a process comprising:
providing a semiconductor substrate, the substrate having a surface;
forming a plurality of composite isolation posts on the surface, each post disposed at a respective position on the surface and extending vertically a respective height from the surface;
depositing an insulating material over the posts and over areas of the surface between the posts;
etching the insulating material so as to form convex sidewalls contiguous to respective vertical surface of the posts; and
growing semiconductor material on the surface between the sidewalls.
2. A semiconductor device as defined in claim 1 , wherein the semiconductor material is grown to a thickness that is greater than the respective heights of the isolation posts.
3. A semiconductor device as defined in claim 2 , wherein the process further comprises:
removing an amount of the semiconductor material so that the semiconductor material retains a thickness approximately equal to the respective heights of the isolation posts.
4. A semiconductor device as defined in claim 1 , wherein the grown semiconductor material is an epitaxial layer of material selected from the group of materials consisting of Si, SiGe, SiGeC, SiC and combination thereof.
5. A semiconductor device as defined in claim 1 , further comprising:
growing a strained cap over the grown epitaxial layer.
6. A semiconductor device as defined in claim 5 , wherein the epitaxial layer is Si and the strained cap is SiGe.
7. A semiconductor device as defined in claim 5 , wherein the epitaxial layer SiGe and the strained cap is Si.
8. A semiconductor device as defined in claim 1 , wherein:
the substrate material is Si; and
the grown epitaxial layer is SiGe having a graded Ge concentration that increases in a direction upward from the surface.
9. A semiconductor device comprising:
a substrate having a surface; and
a plurality of isolation structures disposed at predetermined position on the surface, wherein each isolation structures comprises:
a vertical stack having first and second sidewalls;
a pair of insulating convex sidewall spacers respectively disposed contiguous to the first and the second sidewalls; and
semiconductor material disposed between the isolation structures.
10. A semiconductor device as defined in claim 9 , wherein the vertical stack comprises:
a first layer over the substrate; and
a second layer over the first layer.
11. A semiconductor device as defined in claim 10 , wherein the first layer is an insulation layer and the second layer is an etch stop layer.
12. A semiconductor device as defined in claim 9 , further comprising epitaxial semiconductor material disposed between the isolation structures.
13. A semiconductor device as defined in claim 12 , further comprising:
a strained cap over the epitaxial semiconductor material.
14. A semiconductor device as defined in claim 13 , wherein the strained cap layer has a lattice constant that is greater than the lattice constant of the epitaxial semiconductor material so that a tensile strain is exerted on the epitaxial semiconductor material.
15. A semiconductor device as defined in claim 13 , wherein the strained cap layer has a lattice constant that is less than the lattice constant of the epitaxial semiconductor material so that a compressive stress is exerted on the epitaxial semiconductor material.
16. A semiconductor device as defined in claim 12 , wherein the vertical stack comprises:
a first layer over the substrate; and
a second layer over the first layer.
17. A semiconductor device as defined in claim 16 , wherein the first layer is SiO 2 and the second layer is Si 3 N 4 .
18. An intermediate structure formed in the process of fabricating a semiconductor device, the intermediate structure comprising:
a substrate having a surface;
at least a pair of isolation structures disposed at respective predetermined positions on the surface, wherein each isolation structure comprises a vertical stack having a first sidewall and a second sidewall and comprises a pair of insulating convex sidewall spacers respectively disposed on the substrate contiguous to the first sidewall and to the second sidewall; and
semiconductor material disposed between the isolation structures for forming active areas of the semiconductor device, the semiconductor material having a first surface above the vertical stack, a second surface joining the first surface to the vertical stack of a first isolation structure, and a third surface joining the first surface to the vertical stack of a second isolation structure.
19. An intermediate structure as defined in claim 18 , wherein the first surface exhibits the lattice orientation (100).
20. An intermediate structure as defined in claim 19 , wherein the second surface exhibits the lattice orientation (111).