Scan path timing optimizing apparatus determining connection order of scan path circuits to realize optimum signal timings
View Patent ↗An intra-area connection order determining unit determines at random orders of connection of scan path circuits in each area divided by an placement area dividing unit. An inter-area connection order determining unit determines orders of connection of the scan path circuits between the areas such that length of interconnection between the areas divided by the placement area dividing unit becomes short. Accordingly, length of interconnection between the scan paths can be locally made short, reducing congestion of interconnections and generation of hold time errors.
1. A scan path timing optimizing apparatus, comprising:
a placement area dividing unit dividing a cell placement area into a plurality of areas;
an intra-area connection order determining unit determining a random order of interconnections between scan path circuits in each of the plurality of areas; and
an inter-area connection order determining unit for determining an order of interconnection of the scan path circuits between each of the plurality of areas such that a length of interconnection between the plurality of areas becomes a shortest interconnection, wherein a length of an interconnection between scan path circuits is greater than the shortest interconnection between the plurality of areas.
2. The scan path timing optimizing apparatus according to claim 1 , further comprising:
a connection order switching unit switching, among orders of connection of the scan path circuits determined by said intra-area connection order determining unit, a connection order of the scan path circuits that has a short length of interconnection.
3. A scan path timing optimizing apparatus, comprising:
a shortest distance order determining unit for determining an order of interconnections between scan path circuits such that the scan path becomes a shortest interconnection; and
a connection order switching unit for switching the order of interconnections between the scan path circuits determined by said shortest distance order determining unit, in accordance with a prescribed rule, wherein a length of an interconnection between scan path circuits is greater than the shortest interconnection between the plurality of areas.
4. The scan path timing optimizing apparatus according to claim 3 , wherein
said connection order switching unit first switches, among the orders of connection determined by said shortest distance order determining unit, orders of connection of the scan path circuits of two adjacent scan path circuits starting from a first scan path circuit, and thereafter, switches orders of connection of the scan path circuits of two adjacent scan path circuits starting from a second scan path circuit.
5. The scan path timing optimizing apparatus according to claim 3 , wherein
said connection order switching unit divides the scan path circuits having the orders of connection determined by said shortest distance order determining unit into a plurality of sets, switches orders of connection of the scan path circuits in each set, thereafter divides the scan path circuits into a plurality of sets by a different method, and switches orders of connection of the scan path circuits in each set.
6. A scan path timing optimizing apparatus, comprising:
an automatic placement unit for automatically placing cells in a semiconductor device; and
a connection order determining unit for determining an order of interconnections between scan path circuits in accordance with a prescribed rule such that a delay time between the scan path circuits placed by said automatic placement unit, wherein said delay time becomes at least a prescribed time period, and a length of an interconnection between scan path circuits is greater than a shortest interconnection between the plurality of areas.
7. The scan path timing optimizing apparatus according to claim 6 , wherein
said connection order determining unit connects nearest scan path circuits among scan path circuits placed with at least a prescribed distance from each other.
8. The scan path timing optimizing apparatus according to claim 6 , wherein
said connection order determining unit connects nearest scan path circuits among combinations of scan path circuits of which delay time between scan terminals is estimated to be at least a prescribed time period.
9. The scan path timing optimizing apparatus according to claim 6 , wherein
said connection order determining unit connects the scan path circuits such that delay time between scan terminals becomes at least a prescribed time period longer than a clock arrival time difference.
10. The scan path timing optimizing apparatus according to claim 6 , wherein
said connection order determining unit connects the scan path circuits such that clock arrival time difference between the scan path circuits is not longer than a prescribed time period.