IP Library › Granted Patent US 7,102,237
Granted Patent B1
US 7,102,237 · App. 10/447,466 · Granted Sep 5, 2006

ASIC customization with predefined via mask

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Quick Facts
Patent No.
US 7,102,237
App. No.
10/447,466
Granted
Sep 5, 2006
Kind
B1
Abstract

Disclosed herein is an integrated circuit customized by mask programming using custom conducting layers and via layers interspersed with the custom conducting layers, where the via layers are defined by masks designed prior to receiving a custom circuit design.

Claims (6)

1. A via mask for use in forming custom integrated circuits, comprising:

a plurality of parallel predefined via tracks;

wherein each via track includes a plurality of vias; and

wherein the plurality of parallel via tracks are spaced so that at least two conductor tracks can be placed between two via tracks.

2. The via mask of claim 1 , wherein:

at least one of the vias in the plurality of vias is a double via.

Assignments (3)
MERGER Recorded Jan 6, 2016
From: OTRSOTECH, LIMITED LIABILITY COMPANY
To: CALLAHAN CELLULAR L.L.C.
Reel/Frame 037451/0611 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2008
From: LIGHTSPEED LOGIC, INC.
To: OTRSOTECH, LLC
Reel/Frame 021965/0767 →
CHANGE OF NAME Recorded Mar 13, 2008
From: LIGHTSPEED SEMICONDUCTOR CORPORATION
To: LIGHTSPEED LOGIC, INC.
Reel/Frame 020645/0553 →