IP Library Granted Patent US 6,856,189
Granted Patent B2
US 6,856,189 · App. 10/447,569 · Granted Feb 15, 2005

Delta Vgs curvature correction for bandgap reference voltage generation

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 6,856,189
App. No.
10/447,569
Granted
Feb 15, 2005
Kind
B2
Abstract

A bandgap voltage reference generator may include a BJT (Bipolar Junction Transistor) and a pair of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) coupled to the BJT. The base-emitter voltage Vbe of the BJT may exhibit a non-linearity with respect to temperature. The difference between gate-source voltages of the pair of MOSFETs exhibits an opposite non-linearity with respect to temperature. The opposite non-linearity reduces the effect of the non-linearity on the output voltage of the bandgap voltage reference generator. The difference in gate-source voltages of the pair of MOSFETs may be determined by the ratio of channel width to channel length of each MOSFET included in the pair of MOSFETs.

Claims (25)

1. A bandgap voltage reference generator, comprising:

a BJT (Bipolar Junction Transistor), wherein a base-emitter voltage Vbe of the BJT exhibits a non-linearity with respect to temperature; and

a pair of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) coupled to the BJT, wherein a difference between gate-source voltages of the pair of MOSFETs exhibits an opposite non-linearity with respect to temperature;

wherein the opposite non-linearity reduces an effect of the non-linearity on an output voltage of the bandgap voltage reference generator.

2. The bandgap voltage reference generator of claim 1 , further comprising an additional BJT and an additional pair of MOSFETs coupled to the additional BJT.

3. The bandgap voltage reference generator of claim 2 , further comprising a feedback loop configured to maintain a same drain voltage for a MOSFET included in the pair and for an additional MOSFET included in the additional pair.

4. The bandgap voltage reference generator of claim 2 , wherein a first MOSFET in the pair of MOSFETs has a same channel width to channel length ratio as a first MOSFET in the additional pair of MOSFETs, and wherein a second MOSFET in the pair of MOSFETs has a same channel width to channel length ratio as a second MOSFET in the additional pair of MOSFETs.

5. The bandgap voltage reference generator of claim 1 , further comprising a resistive circuit element coupled between a source of each MOSFET in the pair of MOSFETs, wherein the bandgap voltage reference generator is configured to sum a current through the resistive circuit element with a current that is proportional to absolute temperature to reduce the effect of the nonlinearity of the output voltage.

6. The bandgap voltage reference generator of claim 5 , wherein the resistive circuit element is a resistor, and wherein the resistor is a same type of resistor as an additional resistor through which a current that is proportional to absolute temperature flows, wherein the output voltage depends on a magnitude of the current that is proportional to absolute temperature.

7. The bandgap voltage reference generator of claim 5 , wherein the output voltage does not depend on a magnitude of the current through the resistive circuit element.

8. The bandgap voltage reference generator of claim 1 , wherein the difference in gate-source voltages of the pair of MOSFETs is determined by a ratio of channel width to channel length of each MOSFET included in the pair of MOSFETs.

9. A method for operating a bandgap voltage reference generator, comprising:

powering the bandgap voltage reference generator, wherein the bandgap voltage reference generator comprises a BJT (Bipolar Junction Transistor) and a pair of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) coupled to the BJT, wherein in response to said powering:

a base-emitter voltage Vbe of the BJT exhibits a non-linearity with respect to temperature; and

a difference between gate-source voltages of the pair of MOSFETs exhibits an opposite non-linearity with respect to temperature; and

the bandgap voltage reference generator generating a reference voltage in response to said powering, wherein the opposite non-linearity reduces an effect of the non-linearity on the reference voltage.

10. The method of claim 9 , further comprising a feedback loop maintaining a same drain voltage for a MOSFET included in the pair and for an additional MOSFET included in an additional pair of MOSFETs coupled to an additional BJT.

11. The method of claim 10 , wherein a first MOSFET in the pair of MOSFETs has a same channel width to channel length ratio as a first MOSFET in the additional pair of MOSFETs, and wherein a second MOSFET in the pair of MOSFETs has a same channel width to channel length ratio as a second MOSFET in the additional pair of MOSFETs.

12. The method of claim 9 , further comprising summing a current through a resistive circuit element with a current that is proportional to absolute temperature to reduce the effect of the non-linearity of the reference voltage, wherein the resistive circuit element is coupled between a source of each MOSFET in the pair of MOSFETs.

13. The method of claim 12 , wherein the resistive circuit element is a resistor, and wherein the resistor is a same type of resistor as an additional resistor through which a current that is proportional to absolute temperature flows, wherein the reference voltage depends on a magnitude of the current that is proportional to absolute temperature.

14. The method of claim 9 , wherein the difference in gate-source voltages of the pair of MOSFETs is determined by a ratio of channel width to channel length of each MOSFET included in the pair of MOSFETs.

15. A method, comprising:

a base-emitter voltage Vbe of a BJT (Bipolar Junction Transistor) exhibiting a non-linearity with respect to temperature; and

a difference between gate-source voltages of a pair of MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) coupled to the BJT exhibiting an opposite non-linearity with respect to temperature;

the opposite non-linearity reducing an effect of the non-linearity on an output voltage of a bandgap voltage reference generator, wherein the bandgap voltage reference generator includes the BJT and the pair of MOSFETs.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Mar 14, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 060894/0437 →
RELEASE OF SECURITY INTEREST Recorded Mar 11, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059363/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 10, 2022
From: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
To: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 059863/0400 →
SECURITY INTEREST Recorded Jun 4, 2021
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS NOTES COLLATERAL AGENT
Reel/Frame 057935/0474 →
SECURITY INTEREST Recorded Dec 24, 2020
From: MICROCHIP TECHNOLOGY INCORPORATED; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 055671/0612 →
SECURITY INTEREST Recorded Jun 5, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 053468/0705 →
RELEASE OF SECURITY INTEREST Recorded May 30, 2020
From: JPMORGAN CHASE BANK, N.A, AS ADMINISTRATIVE AGENT
To: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
Reel/Frame 053466/0011 →
SECURITY INTEREST Recorded Apr 24, 2020
From: MICROCHIP TECHNOLOGY INC.; SILICON STORAGE TECHNOLOGY, INC.; ATMEL CORPORATION; MICROSEMI CORPORATION; MICROSEMI STORAGE SOLUTIONS, INC.
To: JPMORGAN CHASE BANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 053311/0305 →
MERGER Recorded Dec 11, 2017
From: STANDARD MICROSYSTEMS CORPORATION
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 044820/0715 →