Autozeroing floating-gate amplifier
View Patent ↗An autozeroing floating-gate amplifier (AFGA) is implemented utilizing a programmable gain element, the characteristics of which may be changed by changing the amount of charge stored on a floating gate device.
1. An autozeroing floating gate amplifier, comprising:
a floating node;
at least one input capacitively coupled to said floating node;
an output node;
a feedback capacitor coupled between said floating node and said output node;
a charge transfer device having an insulating terminal coupled to said floating node and a control terminal coupled to said output node, said charge transfer device adapted to transfer charge to said floating node in response to a signal on said output node; and
a gain device having an input coupled to said floating node and an output coupled to said output node.
2. The amplifier of claim 1 , wherein said gain device comprises an inverter.
3. The amplifier of claim 1 , wherein said gain device comprises an operational amplifier.
4. The amplifier of claim 1 , wherein said gain device comprises an operational transconductance amplifier.
5. The amplifier of claim 1 , wherein said floating node comprises the floating gate of a pFET.
6. The amplifier of claim 1 , wherein said charge transfer device comprises separate elements for (1) transferring electrons to said floating node, and (2) transferring electron from said floating node.
7. The amplifier of claim 6 , wherein said separate elements operate simultaneously.
8. The amplifier of claim 1 , wherein said charge transfer device comprises a single element for bi-directionally transferring electrons to and from said floating node.
9. The amplifier of claim 1 , wherein these are a plurality of inputs capacitively coupled to said floating node.
10. An autozeroing floating gate amplifier, comprising:
means for storing charge;
input means for receiving input signal capacitively coupled to said means for storing charge;
output means for outputting a signal;
feedback means coupled between said means for storing charge and said output means;
charge transfer means coupled to said means for storing charge for transferring charge to the means for storing charge responsive to said output means; and
amplification means for amplifying a signal, said amplification means having an input coupled to said means for storing charge and an output coupled to said charge transfer means and to said output means.
11. The amplifier of claim 10 , wherein said amplification means comprises an inverter.
12. The amplifier of claim 10 , wherein said amplification means comprises an operational amplifier.
13. The amplifier of claim 10 , wherein said amplification means comprises an operational transconductance amplifier.
14. The amplifier of claim 10 , wherein said means for storing charge comprises a floating gate of a pFET.
15. The amplifier of claim 10 , wherein said charge transfer means includes separate means for transferring electrons to said means for storing charge and means for transferring electrons from said means for storing charge.
16. The amplifier of claim 10 , wherein said charge transfer means includes means for bi-directionally transferring electrons to and from said means for storing charge.
17. The amplifier of claim 10 , wherein there are a plurality of said input means.